Abstract: An improved digital signal processor (DSP) architecture includes several multiply/accumulate devices (M-Unit 0-K) connected to the DSP bus through a delay line and elements for simultaneously operating the multiply/accumulate devices and a device for selectively storing accumulated values into a pre-assigned Dual-Port Randomly Accessible Memory area.

Abstract: An improved split-band coder reduces signal-processing time, thereby reducing echo delay time and listener confusion. The voice-originated signal to be transmitted over a transmission line is sampled and digitally coded at a relatively high bit rate; the spectrum of said signal is then partitioned into p sub-bands. The sample stream of the signal so-filtered and partitioned into p sub-bands is split into blocks of samples, or portions, of a given time duration. A requantizing device proceeds for each block to the requantizing of the samples in each sub-band by means of requantizing parameters derived from the samples of the preceding sample block, whereas new requantizing parameters are determined and stored with a view to requantizing the following sample block. The requantized samples in the different sub-bands are multiplexed, and transmitted over the transmission line, together with the values of the highest amplitude samples in each sub-band.

Abstract: This improved speech signal Block Coded PCM (BCPCM) system reduces the number of bits allocated to transmitting the scale factor, thereby releasing bits for allocation to coding samples in the associated block of samples. The scale factor (c) is calculated for every 16 millisecond block of samples. However, the scale factor will be transmitted only once per 32 millisecond block if there is no significant difference between the two sequential values. The original speech signal is split into 16 frequency subbands, each subband initials sampled and 12-bit coded, then requantized in BCPCM at dynamically variable bit rates depending on the scale factor transmission rate.