Patents by Inventor Jean Paul Guillemet

Jean Paul Guillemet has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9239310
    Abstract: There is disclosed a capacitive sensor on a passivation layer of a semiconductor circuit such as an ASIC, and a method for manufacturing such sensor. The system and method may comprise: forming a bottom electrode layer and landing pad on a portion of the passivation layer located over active circuitry of the ASIC; forming a gas sensitive layer onto the bottom electrode layer and the landing pad; creating a via through the gas sensitive layer to expose a portion of the landing pad; forming a top electrode layer onto the gas sensitive layer, wherein the top electrode layer completely overlays a surface area of the bottom electrode layer, and wherein the forming process for the top electrode layer deposits a portion of the top electrode layer into the via hole, thereby forming an electrical connection between the top electrode layer and the landing pad.
    Type: Grant
    Filed: January 10, 2014
    Date of Patent: January 19, 2016
    Assignee: MEAS FRANCE
    Inventors: Jean-Paul Guillemet, Predrag Drljaca, Daniel Beeler, Romuald Gallorini, Vincent Ducere
  • Publication number: 20140197500
    Abstract: There is disclosed a capacitive sensor on a passivation layer of a semiconductor circuit such as an ASIC, and a method for manufacturing such sensor. The system and method may comprise: forming a bottom electrode layer and landing pad on a portion of the passivation layer located over active circuitry of the ASIC; forming a gas sensitive layer onto the bottom electrode layer and the landing pad; creating a via through the gas sensitive layer to expose a portion of the landing pad; forming a top electrode layer onto the gas sensitive layer, wherein the top electrode layer completely overlays a surface area of the bottom electrode layer, and wherein the forming process for the top electrode layer deposits a portion of the top electrode layer into the via hole, thereby forming an electrical connection between the top electrode layer and the landing pad.
    Type: Application
    Filed: January 10, 2014
    Publication date: July 17, 2014
    Inventors: Jean-Paul Guillemet, Predrag Drljaca, Daniel Beeler, Romuald Gallorini, Vincent Ducere
  • Patent number: 6022754
    Abstract: An electronic device comprises a semiconductor substrate (2) having a cavity (32) extending into the substrate (2), a membrane (8) formed over the semiconductor substrate so as to extend across the cavity (32) in the semiconductor substrate and an active region (14, 30) supported by the membrane (8) and positioned adjacent the cavity (32). The membrane (8) comprises a single dielectric layer formed of an oxy-nitride material.
    Type: Grant
    Filed: July 22, 1998
    Date of Patent: February 8, 2000
    Assignee: Motorola, Inc.
    Inventors: Jean-Paul Guillemet, Myriam Combes, Stephane Astie, Emmanuel Scheid
  • Patent number: 5948361
    Abstract: A chemical sensor (10) is formed in part by depositing a stack of dielectric and resistive layers (13-15) on a support substrate (11). A cavity (17) is then formed on a substrate (16) to provide thermal isolation to the chemical sensor (10). The stack of dielectric and resistive layers (13-15) is then bonded to the substrate (16) and the support substrate (11) is removed. A layer of chemical sensing material (30) is then formed on the uppermost dielectric layer (15). Openings (33) may be formed through the stack of dielectric and resistive layers (13-15) to further enhance the thermal isolation of the chemical sensor (10) from the substrate (16).
    Type: Grant
    Filed: August 27, 1996
    Date of Patent: September 7, 1999
    Assignee: Motorola, Inc.
    Inventors: Frank T. Secco D'Aragona, Henry G. Hughes, Lionel Lescouzeres, Jean-Paul Guillemet
  • Patent number: 5907765
    Abstract: A method for forming a semiconductor sensor device comprises providing a substrate (4) and forming a sacrificial layer (18) over the substrate. The sacrificial layer (18) is then patterned and etched to leave a portion (19) on the substrate (4). A first isolation layer (6) is formed over the substrate (4) and portion (19) of the sacrificial layer and a conductive layer (12), which provides a heater for the sensor device, is formed over the first isolation layer (6). The portion (19) of the sacrificial layer is then selectively etched to form a cavity (10) between the first isolation layer (6) and the substrate (4), the cavity (10) providing thermal isolation between the heater and the substrate.
    Type: Grant
    Filed: June 24, 1996
    Date of Patent: May 25, 1999
    Assignee: Motorola, Inc.
    Inventors: Lionel Lescouzeres, Jean Paul Guillemet, Andre Peyre Lavigne