Patents by Inventor Jean-Paul Le Meur

Jean-Paul Le Meur has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4780891
    Abstract: In a method of synchronizing synchronous digital bit streams each comprising bits each having the same duration, one of the bit streams is taken as a reference. This provides a basis for defining successive reference time intervals each equal to the bit duration. A plurality of timing windows are defined within each reference time interval. A second bit stream is subjected to a time-delay that can have a null or zero value. One of the windows is taken as a reference window on the basis of a required phase relationship between the reference bit stream and this second bit stream. The phases of the reference bit stream and the second bit stream are compared to determine a window containing the beginning of each bit of the second bit stream. The time-delay, if any, to be applied to the second bit stream is determined on the basis of this window.
    Type: Grant
    Filed: July 8, 1987
    Date of Patent: October 25, 1988
    Assignee: Alcatel Cit
    Inventors: Jean-Pierre Guerin, Jean-Paul Le Meur, Jean-Paul Morpain
  • Patent number: 4682334
    Abstract: A synchronous data transmission method uses an MB 1C 1F type binary-binary code in which the binary data to be transmitted is subdivided into successive blocks of M bits complemented when they feature a disparity (marks minus spaces) of the same sign as the data already encoded, to which is added a complement bit indicating if complementing has been applied and a frame bit consisting of a parity bit enabling the subdivision into blocks carried out at the encoding stage to be recovered at the decoding stage. The encoder has at the input a demultiplexer carrying out the subdivision into blocks followed by circuits for computing the word digital sum and parity and the running digital sum, together with an inverter circuit which processes the blocks from the multiplexer and their parity bit under the control of a complementing decision circuit and a multiplexer transforming the encoded binary signal from the inverter circuit into an isochronous sequence to which a frame bit is added.
    Type: Grant
    Filed: May 20, 1985
    Date of Patent: July 21, 1987
    Assignee: Compagnie Industrielle Des Telecommunications Cit-Alcatel
    Inventors: Bernard Le Mouel, Herve Le Bescont, Jean-Paul Le Meur