Abstract: A NOR or a NAND gate of integrated circuit type, having a fan-out of at least three and with a propagation time in the order of 1 nanosecond for a power consumption of a fraction of a milliwatt, is provided. The gate comprises an inverter stage supplied by a saturable load, and an amplifier stage injecting into a diode and into a saturable load connected in such a fashion as to effect a voltage shift. At the input, there are field-effect transistors of low threshold voltage (-0.2 volts), drawing two microamps at zero gate voltage. For the remainder of the circuit, field-effect transistors having a higher absolute threshold voltage (-0.6 volts) are used, these being designed to draw a very low current at a supply voltage of 1.5 volt.