Patents by Inventor Jean-Pierre Oddou
Jean-Pierre Oddou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230263082Abstract: An integrated circuit includes a substrate with an active area, a first insulating layer, a second insulating layer, and a phase-change material. The integrated circuit further includes a heating element in an L-shape, with a long side in direct physical contact with the phase-change material and a short side in direct physical contact with a via. The heating element is surrounded by first, second, and third insulating spacers, with the first insulating spacer having a planar first sidewall in contact with the long side of the heating element, a convex second sidewall, and a planar bottom face in contact with the short side of the heating element. The second and third insulating spacers are in direct contact with the first insulating spacer and the long side of the heating element.Type: ApplicationFiled: April 3, 2023Publication date: August 17, 2023Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Rousset) SASInventors: Franck ARNAUD, David GALPIN, Stephane ZOLL, Olivier HINSINGER, Laurent FAVENNEC, Jean-Pierre ODDOU, Lucile BROUSSOUS, Philippe BOIVIN, Olivier WEBER, Philippe BRUN, Pierre MORIN
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Patent number: 11653582Abstract: An electronic chip includes memory cells made of a phase-change material and a transistor. First and second vias extend from the transistor through an intermediate insulating layer to a same height. A first metal level including a first interconnection track in contact with the first via is located over the intermediate insulating layer. A heating element for heating the phase-change material is located on the second via, and the phase-change material is located on the heating element. A second metal level including a second interconnection track is located above the phase-change material. A third via extends from the phase-change material to the second interconnection track.Type: GrantFiled: November 8, 2018Date of Patent: May 16, 2023Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Rousset) SASInventors: Franck Arnaud, David Galpin, Stephane Zoll, Olivier Hinsinger, Laurent Favennec, Jean-Pierre Oddou, Lucile Broussous, Philippe Boivin, Olivier Weber, Philippe Brun, Pierre Morin
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Publication number: 20190140176Abstract: An electronic chip includes memory cells made of a phase-change material and a transistor. First and second vias extend from the transistor through an intermediate insulating layer to a same height. A first metal level including a first interconnection track in contact with the first via is located over the intermediate insulating layer. A heating element for heating the phase-change material is located on the second via, and the phase-change material is located on the heating element. A second metal level including a second interconnection track is located above the phase-change material. A third via extends from the phase-change material to the second interconnection track.Type: ApplicationFiled: November 8, 2018Publication date: May 9, 2019Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Rousset) SASInventors: Franck ARNAUD, David GALPIN, Stephane ZOLL, Olivier HINSINGER, Laurent FAVENNEC, Jean-Pierre ODDOU, Lucile BROUSSOUS, Philippe BOIVIN, Olivier WEBER, Philippe BRUN, Pierre MORIN
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Patent number: 10199413Abstract: A color image sensor including an array of pixels is formed in a semiconductor layer having a back side that receives an illumination. Insulated conductive walls penetrate into the semiconductor layer from the back side and separate the pixels from one another. For each pixel, a color pixel penetrates into from 5 to 30% of a thickness of the semiconductor layer from the back side and occupies at least 90% of the surface area delimited by the walls. An electrically-conductive layer extends from the lateral wall of the filter all the way to the walls.Type: GrantFiled: December 12, 2017Date of Patent: February 5, 2019Assignees: STMICROELECTRONICS SA, STMICROELECTRONICS(CROLLES 2) SASInventors: Axel Crocherie, Jean-Pierre Oddou, Stéphane Allegret-Maret, Hugues Leininger
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Patent number: 10128295Abstract: A semiconductor substrate includes a photodiode region, a charge storage region electrically coupled to the photodiode region and a capacitive deep trench isolation (CDTI) structure including a conductive region positioned between the photodiode region and the charge storage region. A contact etch stop layer overlies the semiconductor substrate and a premetallization dielectric layer overlies the contact etch stop layer. A first trench, filled with a metal material, extends through the premetallization dielectric layer and bottoms out at or in the contact etch stop layer. A second trench, also filled with the metal material, extends through the premetallization dielectric layer and the contact etch stop layer and bottoms out at or in the conductive region of the CDTI structure. The metal filled first trench forms an optical shield between the photodiode region and the charge storage region. The metal filled second trench forms a contact for biasing the CDTI structure.Type: GrantFiled: January 10, 2018Date of Patent: November 13, 2018Assignee: STMicroelectronics (Crolles 2) SASInventors: Sebastien Lagrasta, Delia Ristoiu, Jean-Pierre Oddou, Cécile Jenny
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Publication number: 20180158861Abstract: A semiconductor substrate includes a photodiode region, a charge storage region electrically coupled to the photodiode region and a capacitive deep trench isolation (CDTI) structure including a conductive region positioned between the photodiode region and the charge storage region. A contact etch stop layer overlies the semiconductor substrate and a premetallization dielectric layer overlies the contact etch stop layer. A first trench, filled with a metal material, extends through the premetallization dielectric layer and bottoms out at or in the contact etch stop layer. A second trench, also filled with the metal material, extends through the premetallization dielectric layer and the contact etch stop layer and bottoms out at or in the conductive region of the CDTI structure. The metal filled first trench forms an optical shield between the photodiode region and the charge storage region. The metal filled second trench forms a contact for biasing the CDTI structure.Type: ApplicationFiled: January 10, 2018Publication date: June 7, 2018Applicant: STMicroelectronics (Crolles 2) SASInventors: Sebastien Lagrasta, Delia Ristoiu, Jean-Pierre Oddou, Cécile Jenny
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Publication number: 20180102387Abstract: A color image sensor including an array of pixels is formed in a semiconductor layer having a back side that receives an illumination. Insulated conductive walls penetrate into the semiconductor layer from the back side and separate the pixels from one another. For each pixel, a color pixel penetrates into from 5 to 30% of a thickness of the semiconductor layer from the back side and occupies at least 90% of the surface area delimited by the walls. An electrically-conductive layer extends from the lateral wall of the filter all the way to the walls.Type: ApplicationFiled: December 12, 2017Publication date: April 12, 2018Inventors: Axel Crocherie, Jean-Pierre Oddou, Stéphane Allegret-Maret, Hugues Leininger
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Publication number: 20180076250Abstract: A semiconductor substrate includes a photodiode region, a charge storage region electrically coupled to the photodiode region and a capacitive deep trench isolation (CDTI) structure including a conductive region positioned between the photodiode region and the charge storage region. A contact etch stop layer overlies the semiconductor substrate and a premetallization dielectric layer overlies the contact etch stop layer. A first trench, filled with a metal material, extends through the premetallization dielectric layer and bottoms out at or in the contact etch stop layer. A second trench, also filled with the metal material, extends through the premetallization dielectric layer and the contact etch stop layer and bottoms out at or in the conductive region of the CDTI structure. The metal filled first trench forms an optical shield between the photodiode region and the charge storage region. The metal filled second trench forms a contact for biasing the CDTI structure.Type: ApplicationFiled: September 13, 2016Publication date: March 15, 2018Applicant: STMicroelectronics (Crolles 2) SASInventors: Sebastien Lagrasta, Delia Ristoiu, Jean-Pierre Oddou, Cécile Jenny
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Patent number: 9917126Abstract: A semiconductor substrate includes a photodiode region, a charge storage region electrically coupled to the photodiode region and a capacitive deep trench isolation (CDTI) structure including a conductive region positioned between the photodiode region and the charge storage region. A contact etch stop layer overlies the semiconductor substrate and a premetallization dielectric layer overlies the contact etch stop layer. A first trench, filled with a metal material, extends through the premetallization dielectric layer and bottoms out at or in the contact etch stop layer. A second trench, also filled with the metal material, extends through the premetallization dielectric layer and the contact etch stop layer and bottoms out at or in the conductive region of the CDTI structure. The metal filled first trench forms an optical shield between the photodiode region and the charge storage region. The metal filled second trench forms a contact for biasing the CDTI structure.Type: GrantFiled: September 13, 2016Date of Patent: March 13, 2018Assignee: STMicroelectronics (Crolles 2) SASInventors: Sebastien Lagrasta, Delia Ristoiu, Jean-Pierre Oddou, Cécile Jenny
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Patent number: 9859319Abstract: A color image sensor including an array of pixels is formed in a semiconductor layer having a back side that receives an illumination. Insulated conductive walls penetrate into the semiconductor layer from the back side and separate the pixels from one another. For each pixel, a color pixel penetrates into from 5 to 30% of a thickness of the semiconductor layer from the back side and occupies at least 90% of the surface area delimited by the walls. An electrically-conductive layer extends from the lateral wall of the filter all the way to the walls.Type: GrantFiled: October 27, 2015Date of Patent: January 2, 2018Assignees: STMicroelectronics SA, STMicroelectronics (Crolles 2) SASInventors: Axel Crocherie, Jean-Pierre Oddou, Stéphane Allegret-Maret, Hugues Leininger
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Patent number: 9685475Abstract: A back-illuminated integrated imaging device is formed from a semiconductor substrate including a zone of pixels bounded by capacitive deep trench isolations. A peripheral zone is located outside the zone of pixels. A continuous electrically conductive layer forms, in the zone of pixels, an electrode in a trench for each capacitive deep trench isolation, and forms, in the peripheral zone, a redistribution layer for electrically coupling the electrode to a biasing contact pad. The electrode is located in the trench between a trench dielectric and at least one material for filling the trench.Type: GrantFiled: September 8, 2015Date of Patent: June 20, 2017Assignee: STMICROELECTRONICS (CROLLES 2) SASInventors: Francois Guyader, Jean-Pierre Oddou, Stephane Allegret-Maret, Mickael Gros-Jean
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Publication number: 20160233258Abstract: A color image sensor including an array of pixels is formed in a semiconductor layer having a back side that receives an illumination. Insulated conductive walls penetrate into the semiconductor layer from the back side and separate the pixels from one another. For each pixel, a color pixel penetrates into from 5 to 30% of a thickness of the semiconductor layer from the back side and occupies at least 90% of the surface area delimited by the walls. An electrically-conductive layer extends from the lateral wall of the filter all the way to the walls.Type: ApplicationFiled: October 27, 2015Publication date: August 11, 2016Inventors: Axel CROCHERIE, Jean-Pierre ODDOU, Stéphane ALLEGRET-MARET, Hugues LEININGER
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Publication number: 20160099278Abstract: A back-illuminated integrated imaging device is formed from a semiconductor substrate including a zone of pixels bounded by capacitive deep trench isolations. A peripheral zone is located outside the zone of pixels. A continuous electrically conductive layer forms, in the zone of pixels, an electrode in a trench for each capacitive deep trench isolation, and forms, in the peripheral zone, a redistribution layer for electrically coupling the electrode to a biasing contact pad. The electrode is located in the trench between a trench dielectric and at least one material for filling the trench.Type: ApplicationFiled: September 8, 2015Publication date: April 7, 2016Applicant: STMICROELECTRONICS (CROLLES 2) SASInventors: Francois Guyader, Jean-Pierre Oddou, Stephane Allegret-Maret, Mickael Gros-Jean
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Patent number: 9224775Abstract: An integrated circuit includes a back side illuminated image sensor formed by a substrate supporting at least one pixel, an interconnect part situated above a front side of the substrate and an anti-reflective layer situated above a back side of the substrate. The anti-reflective layer may be formed of a silicon nitride layer. An additional layer is situated above the anti-reflective layer. The additional layer is formed of one of amorphous silicon nitride or hydrogenated amorphous silicon nitride, in which the ratio of the number of silicon atoms per cubic centimeter to the number of nitrogen atoms per cubic centimeter is greater than 0.7.Type: GrantFiled: July 30, 2014Date of Patent: December 29, 2015Assignees: STMicroelectronics (Crolles 2) SAS, Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Jean-Pierre Carrere, Patrick Gros D'Aillon, Stephane Allegret-Maret, Jean-Pierre Oddou
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Patent number: 9099604Abstract: A method for manufacturing an image sensor, including the successive steps of: forming columns of a semiconductor material; forming one or several pixels at a first end of each of the columns; and deforming the structure so that the second ends of each of the columns come closer to each other or draw away from each other to form a surface in the shape of a polyhedral cap.Type: GrantFiled: April 8, 2013Date of Patent: August 4, 2015Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics S.A.Inventors: François Roy, Lucile Broussous, Julien Michelot, Jean-Pierre Oddou
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Publication number: 20150035106Abstract: An integrated circuit includes a back side illuminated image sensor formed by a substrate supporting at least one pixel, an interconnect part situated above a front side of the substrate and an anti-reflective layer situated above a back side of the substrate. The anti-reflective layer may be formed of a silicon nitride layer. An additional layer is situated above the anti-reflective layer. The additional layer is formed of one of amorphous silicon nitride or hydrogenated amorphous silicon nitride, in which the ratio of the number of silicon atoms per cubic centimeter to the number of nitrogen atoms per cubic centimeter is greater than 0.7.Type: ApplicationFiled: July 30, 2014Publication date: February 5, 2015Applicants: STMicroelectronics (Crolles 2) SAS, Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Jean-Pierre Carrere, Patrick Gros D'Aillon, Stephane Allegret-Maret, Jean-Pierre Oddou
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Patent number: 8610048Abstract: A method for producing a photosensitive integrated circuit including producing circuit control transistors, producing, above the control transistors, and between at least one upper electrode and at least one lower electrode, at least one photodiode, by amorphous silicon layers into which photons from incident electromagnetic radiation are absorbed, producing at least one passivation layer, between the lower electrode and the control transistors, and producing, between the control transistors and the external surface of the integrated circuit, a reflective layer capable of reflecting photons not absorbed by the amorphous silicon layers.Type: GrantFiled: September 22, 2011Date of Patent: December 17, 2013Assignee: STMicroelectronics S.A.Inventors: Jerome Alieu, Simon Guillaumet, Christophe Legendre, Hughes Leininger, Jean-Pierre Oddou, Marc Vincent
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Publication number: 20120161269Abstract: A front-side illuminated image sensor, including photodetection regions, charge transfer elements, and an interconnection stack, all formed at the surface of a semiconductor substrate, microcavities being formed in the interconnection stack in front of the photodetection regions, microcavities being filled with materials forming color filters including metal pigments, regions of a material forming a barrier against ionic diffusion extending on the lateral walls of the microcavities.Type: ApplicationFiled: December 22, 2011Publication date: June 28, 2012Applicants: STMicroelectronics S.A., Commissariat a l`Energie Atomique et aux Energies Alternatives, STMicroelectronics (Crolles 2) SASInventors: Christophe Aumont, Jean-Pierre Oddou, Jérôme Vaillant, Patrick Gros D'Aillon
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Publication number: 20120006980Abstract: A method for producing a photosensitive integrated circuit including producing circuit control transistors, producing, above the control transistors, and between at least one upper electrode and at least one lower electrode, at least one photodiode, by amorphous silicon layers into which photons from incident electromagnetic radiation are absorbed, producing at least one passivation layer, between the lower electrode and the control transistors, and producing, between the control transistors and the external surface of the integrated circuit, a reflective layer capable of reflecting photons not absorbed by the amorphous silicon layers.Type: ApplicationFiled: September 22, 2011Publication date: January 12, 2012Applicant: STMICROELECTRONICS S.A.Inventors: JÉRÔME ALIEU, SIMON GUILLAUMET, CHRISTOPHE LEGENDRE, HUGHES LEININGER, JEAN-PIERRE ODDOU, MARC VINCENT
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Patent number: 8044443Abstract: A method for producing a photosensitive integrated circuit including producing circuit control transistors, producing, above the control transistors, and between at least one upper electrode and at least one lower electrode, at least one photodiode, by amorphous silicon layers into which photons from incident electromagnetic radiation are absorbed, producing at least one passivation layer, between the lower electrode and the control transistors, and producing, between the control transistors and the external surface of the integrated circuit, a reflective layer capable of reflecting photons not absorbed by the amorphous silicon layers.Type: GrantFiled: November 21, 2006Date of Patent: October 25, 2011Assignee: STMicroelectronics S.A.Inventors: Jérôme Alieu, Simon Guillaumet, Christophe Legendre, Hugues Leininger, Jean-Pierre Oddou, Marc Vincent