Abstract: A sigma-delta converter including a switching component controlled by a first clock having determined transitions for generating a train of sigma-delta code pulses corresponding to an analog input value. The sigma-delta includes circuits for generating a second clock of a same frequency as the first clock and having a negative transition followed after a defined period of time (d2) by a positive transition. The determined transitions of the first clock controlling the switching element occur during said defined period of time. There is also included a circuit controlled by the sigma-delta code pulse train and said second clock for generating a train of sigma-delta pulses insensitive to the mismatch of the rise and fall times of the switching element thereby improving the linearity and the signal-to-noise ratio of the converter.

Abstract: A monolithic module acting as the interface between a modem and leased ("LL") or switched ("SL") telephone lines, mainly characterized in that: 1. It can be formed on a silicon chip (due to the absence of electromechanical relays or similar switching means), and 2. Its architecture is such that it makes it possible, by interconnecting or "stacking" identical modules, not only to attach additional telephone lines, but also to increase the number of allowable modem configurations. The module (10, 10') comprises two controlled-type line amplifiers (DLL, DSL) which exhibit a high output impedance regardless of whether the power supplies are "on" or "off"; two controlled-type line receivers (RSL, RLL) which provide a very high input impedance whether the power supplies are "on" or "off"; and a wrap receiver (WRP) for testing the modem (to the exclusion of the telephone lines) and interconnecting or "stacking" identical modules.

Abstract: A monolithically integrated resistive attenuator is autobiased from an input bipolar signal the amplitude of which is higher than the integrated circuit voltage supplies. The resistive attenuator is arranged in a first pocket formed in an epitaxial layer, and is connected between the input bipolar signal and ground. An intermediate tap produces an output signal. A diode and capacitor are formed in a second pocket. The diode is connected between the input bipolar signals and the epitaxial layer while the capacitor is connected between the epitaxial layer and the isolation walls thereof. The positive half-periods of the input bipolar signal charges the capacitor, which in turn biases the epitaxial layers. The attenuator, therefore, can be monolithically integrated into a silicon chip and remain isolated for all values of the input bipolar signal.

Abstract: A circuit for receiving signals from a device connected through a line meeting the requirements of EIA RS232C Standard, comprising a differential amplifier (2) receiving an input signal the amplitude of which is divided by factor k through input network (1). The switching threshold of amplifier (2) is variable and has a first value to ensure switching on the positive slope edge of the input signal and a second value to ensure switching on the negative slope edge. This circuit comprises circuits for detecting the status of the connected device, including a level detector (3) and a decision circuit (4) which, according to the outputs of the receiver and level detector (5), generates a signal indicating the status of the connected device. Integrators (5, 6) are provided for preventing the status indicating signal from changing its level when the input signal goes through zero or receives short noise pulses.

Abstract: An interface circuit for exchanging digital signals between two pieces of data processing equipment is provided in integrated form in accordance with international standards, such as EIA Standards. This is achieved through modification of an operational amplifier to adapt its use to the conditions and requirements of interface circuits.