Patents by Inventor Jean-Pierre Suzzoni
Jean-Pierre Suzzoni has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7546400Abstract: Data packet buffering system comprising a data buffer for buffering data packets, a first counter (24) preloaded with the data packet size (32) and decremented at each read clock signal of a number of logical units corresponding to the width of the output bus (18), a second counter (28) preloaded with the data packet size and decremented at each write clock signal of a number of logical units corresponding to the width of the input bus (14), the decrementation of the second counter being started at the same time as the decrementation of the first counter by a start counter signal (38), and a threshold unit (52) for determining the minimum threshold from the contents of the second counter when the first counter has reached zero and providing the minimum threshold to a buffer management logic unit a buffer management logic unit (22) providing write grant signals when data may be read from the data buffer and sent to an output device.Type: GrantFiled: February 15, 2005Date of Patent: June 9, 2009Assignee: International Business Machines CorporationInventors: Jean-Pierre Suzzoni, Fabrice Gorzegno, Lionel Guenoun, Denis Roman
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Patent number: 7321648Abstract: A drift compensation system includes a first clock phase alignment circuit adapted for providing an output clock signal which is frequency locked to an input reference clock signal; a second clock phase alignment circuit identical to the first clock phase alignment circuit but wherein the reference clock signal is the output clock signal provided by the first clock phase alignment circuit; first deviation means at the output of the first clock phase alignment circuit for providing a first deviation between its current clock phase and its initial clock phase; second deviation means at the output of the second clock phase alignment circuit for providing a second deviation between its current clock phase and its initial clock phase; and a phase control logic adapted for providing first phase shift signals as inputs to the first clock phase alignment circuit in order to cancel the phase shift between the output clock signal and the reference clock signal in response to the difference between the first and the secType: GrantFiled: June 30, 2004Date of Patent: January 22, 2008Assignee: International Business Machines CorporationInventors: Lionel Guenoun, Denis Roman, Jean-Pierre Suzzoni
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Publication number: 20060002499Abstract: A drift compensation system includes a first clock phase alignment circuit adapted for providing an output clock signal which is frequency locked to an input reference clock signal; a second clock phase alignment circuit identical to the first clock phase alignment circuit but wherein the reference clock signal is the output clock signal provided by the first clock phase alignment circuit; first deviation means at the output of the first clock phase alignment circuit for providing a first deviation between its current clock phase and its initial clock phase; second deviation means at the output of the second clock phase alignment circuit for providing a second deviation between its current clock phase and its initial clock phase; and a phase control logic adapted for providing first phase shift signals as inputs to the first clock phase alignment circuit in order to cancel the phase shift between the output clock signal and the reference clock signal in response to the difference between the first and the secType: ApplicationFiled: June 30, 2004Publication date: January 5, 2006Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Lionel Guenoun, Denis Roman, Jean-Pierre Suzzoni
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Publication number: 20050180250Abstract: Data packet buffering system comprising a data buffer for buffering data packets, a first counter (24) preloaded with the data packet size (32) and decremented at each read clock signal of a number of logical units corresponding to the width of the output bus (18), a second counter (28) preloaded with the data packet size and decremented at each write clock signal of a number of logical units corresponding to the width of the input bus (14), the decrementation of the second counter being started at the same time as the decrementation of the first counter by a start counter signal (38), and a threshold unit (52) for determining the minimum threshold from the contents of the second counter when the first counter has reached zero and providing the minimum threshold to a buffer management logic unit a buffer management logic unit (22) providing write grant signals when data may be read from the data buffer and sent to an output device.Type: ApplicationFiled: February 15, 2005Publication date: August 18, 2005Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Jean-Pierre Suzzoni, Fabrice Gorzegno, Lionel Guenoun, Denis Roman
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Patent number: 6884096Abstract: An apparatus for positioning an electronic printed circuit board within a electronic chassis is disclosed. The PCB includes at least one connector and the chassis backplane includes at least one connector adapted for electrically connecting to the PCB connector when the PCB is latched within the chassis. The apparatus comprises a lever and a rod. The lever includes a first pivot means that is rotated about the edge of the chassis. The lever is movable between a first position and a second position to allow the connector mounted on the back end of the PCB to engage the backplane connector by actuating the lever downward, or to disengage the PCB connector from the backplane connector by actuating the lever upward. The rod is pivotally coupled to the PCB by a rod pivot and pivotally coupled to the lever by a lever pivot that enables movement of the rod along the same plane in which the lever is actuated.Type: GrantFiled: December 10, 2003Date of Patent: April 26, 2005Assignee: International Business Machines CorporationInventors: Bruno Centola, Denis G. Roman, Jean-Pierre Suzzoni
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Publication number: 20040219811Abstract: An apparatus for positioning an electronic printed circuit board within a electronic chassis is disclosed. The PCB includes at least one connector and the chassis backplane includes at least one connector adapted for electrically connecting to the PCB connector when the PCB is latched within the chassis. The apparatus comprises a lever and a rod. The lever includes a first pivot means that is rotated about the edge of the chassis. The lever is movable between a first position and a second position to allow the connector mounted on the back end of the PCB to engage the backplane connector by actuating the lever downward, or to disengage the PCB connector from the backplane connector by actuating the lever upward. The rod is pivotally coupled to the PCB by a rod pivot and pivotally coupled to the lever by a lever pivot that enables movement of the rod along the same plane in which the lever is actuated.Type: ApplicationFiled: December 10, 2003Publication date: November 4, 2004Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Bruno Centola, Denis G. Roman, Jean-Pierre Suzzoni
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Patent number: 6176728Abstract: The connecting device includes a securing plate and locking spring attached to the cable connector of the cable-to-card connectors. The connecting device is pressed, when the connectors are mated, by the front portion of the cable connector against the host machine chassis which in turn is pressed flat against the adapter card brackets. In a preferred embodiment the connecting device is attached on the front portion of a standard cable connector with removable fastener, in particular with a locking spring. In another embodiment, the connecting device is an integral part of the cable connector.Type: GrantFiled: June 12, 1998Date of Patent: January 23, 2001Assignee: International Business Machines CorporationInventors: Yves Bonnet, Jacques Cresp, Jean-Pierre Suzzoni, Jean-Marie Limon, Bruno Centola, Dominique Baron
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Patent number: 4336423Abstract: A switching network includes electronic crosspoint switches for providing electronic connection or disconnection between two voice stations. Each station is connected to the network through a line transformer. When two stations are connected to each other, the voice path in the network includes the secondary winding of the 1st station transformer, a series of crosspoint switches, a middle junctor, a series of crosspoint switches, and the secondary winding of the 2nd station transformer. Each middle junctor includes a negative resistance circuit which introduces a negative resistance in series with the voice path, thus compensating for the series losses in the network, and two negative inductance circuits connected on both sides of the junctor in parallel with the voice path, to compensate for the parallel losses, especially those introduced by the line transformers.Type: GrantFiled: July 10, 1980Date of Patent: June 22, 1982Assignee: International Business Machines Corp.Inventors: Emile Morlec, Daniel Reynes, Jean-Pierre Suzzoni