Patents by Inventor Jean R. Vatus

Jean R. Vatus has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11041253
    Abstract: A system for depositing thin single crystal silicon wafers by epitaxial deposition in a silicon precursor depletion mode with cross-flow deposition may include: a substrate carrier with low total heat capacity, high emissivity and small volume; a lamp module with rapid heat-up, efficient heat production, and spatial control over heating; and a manifold designed for cross-flow processing. Furthermore, the substrate carrier may include heat reflectors to control heat loss from the edges of the carrier and/or heat chokes to thermally isolate the carrier from the manifolds, allowing independent temperature control of the manifolds. The carrier and substrates may be configured for deposition on both sides of the substrates—the substrates having release layers on both sides and the carriers being configured to have equal process gas flow over both surfaces of the substrate. High volume may be addressed by a deposition system comprising multiple mini-batch reactors.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: June 22, 2021
    Assignee: Svagos Technik, Inc.
    Inventors: Visweswaren Sivaramakrishnan, Tirunelveli S. Ravi, Andrzej Kaszuba, Quoc Vinh Truong, Jean R. Vatus
  • Publication number: 20190003076
    Abstract: A system for depositing thin single crystal silicon wafers by epitaxial deposition in a silicon precursor depletion mode with cross-flow deposition may include: a substrate carrier with low total heat capacity, high emissivity and small volume; a lamp module with rapid heat-up, efficient heat production, and spatial control over heating; and a manifold designed for cross-flow processing. Furthermore, the substrate carrier may include heat reflectors to control heat loss from the edges of the carrier and/or heat chokes to thermally isolate the carrier from the manifolds, allowing independent temperature control of the manifolds. The carrier and substrates may be configured for deposition on both sides of the substrates—the substrates having release layers on both sides and the carriers being configured to have equal process gas flow over both surfaces of the substrate. High volume may be addressed by a deposition system comprising multiple mini-batch reactors.
    Type: Application
    Filed: May 29, 2018
    Publication date: January 3, 2019
    Inventors: Visweswaren Sivaramakrishnan, Tirunelveli S. Ravi, Andrzej Kaszuba, Quoc Vinh Truong, Jean R. Vatus
  • Patent number: 9982363
    Abstract: A system for depositing thin single crystal silicon wafers by epitaxial deposition in a silicon precursor depletion mode with cross-flow deposition may include: a substrate carrier with low total heat capacity, high emissivity and small volume; a lamp module with rapid heat-up, efficient heat production, and spatial control over heating; and a manifold designed for cross-flow processing. Furthermore, the substrate carrier may include heat reflectors to control heat loss from the edges of the carrier and/or heat chokes to thermally isolate the carrier from the manifolds, allowing independent temperature control of the manifolds. The carrier and substrates may be configured for deposition on both sides of the substrates—the substrates having release layers on both sides and the carriers being configured to have equal process gas flow over both surfaces of the substrate. High volume may be addressed by a deposition system comprising multiple mini-batch reactors.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: May 29, 2018
    Assignee: Crystal Solar, Incorporated
    Inventors: Visweswaren Sivaramakrishnan, Tirunelveli S. Ravi, Andrzej Kaszuba, Quoc Vinh Truong, Jean R. Vatus
  • Publication number: 20160222544
    Abstract: A system for depositing thin single crystal silicon wafers by epitaxial deposition in a silicon precursor depletion mode with cross-flow deposition may include: a substrate carrier with low total heat capacity, high emissivity and small volume; a lamp module with rapid heat-up, efficient heat production, and spatial control over heating; and a manifold designed for cross-flow processing. Furthermore, the substrate carrier may include heat reflectors to control heat loss from the edges of the carrier and/or heat chokes to thermally isolate the carrier from the manifolds, allowing independent temperature control of the manifolds. The carrier and substrates may be configured for deposition on both sides of the substrates—the substrates having release layers on both sides and the carriers being configured to have equal process gas flow over both surfaces of the substrate. High volume may be addressed by a deposition system comprising multiple mini-batch reactors.
    Type: Application
    Filed: February 3, 2016
    Publication date: August 4, 2016
    Inventors: Visweswaren Sivaramakrishnan, Tirunelveli S. Ravi, Andrzej Kaszuba (Deceased), Quoc Vinh Truong, Jean R. Vatus
  • Patent number: 9255346
    Abstract: A system for depositing thin single crystal silicon wafers by epitaxial deposition in a silicon precursor depletion mode with cross-flow deposition may include: a substrate carrier with low total heat capacity, high emissivity and small volume; a lamp module with rapid heat-up, efficient heat production, and spatial control over heating; and a manifold designed for cross-flow processing. Furthermore, the substrate carrier may include heat reflectors to control heat loss from the edges of the carrier and/or heat chokes to thermally isolate the carrier from the manifolds, allowing independent temperature control of the manifolds. The carrier and substrates may be configured for deposition on both sides of the substrates—the substrates having release layers on both sides and the carriers being configured to have equal process gas flow over both surfaces of the substrate. High volume may be addressed by a deposition system comprising multiple mini-batch reactors.
    Type: Grant
    Filed: May 29, 2012
    Date of Patent: February 9, 2016
    Assignee: Crystal Solar, Incorporated
    Inventors: Visweswaren Sivaramakrishnan, Tirunelveli S. Ravi, Andrzej Kaszuba, Bozena Kaszuba, Quoc Vinh Truong, Jean R. Vatus
  • Patent number: 9058988
    Abstract: Methods of depositing layers having reduced interfacial contamination are disclosed herein. The inventive methods may advantageously reduce contamination at the interface between deposited layers, for example, between a deposited layer and an underlying substrate or film. In some embodiments, a method of depositing a layer may include annealing a silicon-containing layer having a first layer disposed thereon in a reducing atmosphere; removing the first layer using an etching process to expose the silicon-containing layer after annealing; and depositing a second layer on the exposed silicon-containing layer.
    Type: Grant
    Filed: March 4, 2010
    Date of Patent: June 16, 2015
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Jean R. Vatus, Jinsong Tang, Yihwan Kim, Satheesh Kuppurao, Errol Sanchez
  • Patent number: 8512472
    Abstract: Methods and apparatus for controlling temperature and flow characteristics of process gases in a process chamber have been provided herein. In some embodiments, an apparatus for controlling temperature and flow characteristics of a process gas in a process chamber may include a gas pre-heat ring configured to be disposed about a substrate and having a labyrinthine conduit disposed therein, wherein the labyrinthine conduit has an inlet and outlet to facilitate the flow of the process gas therethrough.
    Type: Grant
    Filed: November 13, 2008
    Date of Patent: August 20, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Jean R. Vatus, Kailash Kiran Patalay
  • Patent number: 8441640
    Abstract: A substrate processing system includes an optical measurement assembly coupled to an exterior of a processing chamber that has a portion that is transparent. The processing chamber includes a reference object and a pedestal for supporting a work piece. The optical measurement assembly measures a lateral location, a height and a tilt of the pedestal by transmitting light into the processing chamber through the transparent portion of the processing chamber and detecting a reflected light from both the reference object and the portion of the pedestal after the reflected light leaves the chamber through the transparent portion of the processing chamber. A method of adjusting a pedestal includes analyzing the reflected light and leveling the pedestal, translating the pedestal, calibrating the pedestal height to a preheat ring level, and checking the level and location of the pedestal in response to the analyzed reflected light.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: May 14, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Kailash Kiran Patalay, Richard O. Collins, Jean R. Vatus, Zhepeng Cong
  • Patent number: 8398777
    Abstract: A pedestal positioning assembly system for use in a substrate processing system includes a pedestal rigidly attached to a pedestal shaft, a reference rigidly attached to the substrate processing system, a lateral adjustment assembly to adjust a lateral location of the pedestal relative to the reference, and a vertical adjustment assembly to adjust a tilt of the pedestal relative to the reference. The lateral adjustment assembly and the vertical adjustment assembly are external to a processing chamber and are coupled to the pedestal disposed within the processing chamber through the pedestal shaft. The reference can be a ring and the lateral adjustment assembly substantially centers the pedestal within the ring. A method of adjusting a pedestal includes leveling the pedestal, translating the pedestal, calibrating the pedestal height to a preheat ring level, and checking the level and location of the pedestal while rotating the pedestal.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: March 19, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Richard O. Collins, Kailash Kiran Patalay, Jean R. Vatus, Zhepeng Cong
  • Publication number: 20130032084
    Abstract: A system for depositing thin single crystal silicon wafers by epitaxial deposition in a silicon precursor depletion mode with cross-flow deposition may include: a substrate carrier with low total heat capacity, high emissivity and small volume; a lamp module with rapid heat-up, efficient heat production, and spatial control over heating; and a manifold designed for cross-flow processing. Furthermore, the substrate carrier may include heat reflectors to control heat loss from the edges of the carrier and/or heat chokes to thermally isolate the carrier from the manifolds, allowing independent temperature control of the manifolds. The carrier and substrates may be configured for deposition on both sides of the substrates—the substrates having release layers on both sides and the carriers being configured to have equal process gas flow over both surfaces of the substrate. High volume may be addressed by a deposition system comprising multiple mini-batch reactors.
    Type: Application
    Filed: May 29, 2012
    Publication date: February 7, 2013
    Applicant: Crytal Solar, Incorporated
    Inventors: Visweswaren Sivaramakrishnan, Tirunelveli S. Ravi, Quoc Vinh Truong, Jean R. Vatus, Visweswaren Sivaramakrishnan
  • Patent number: 7964038
    Abstract: Methods and apparatus for providing an improved azimuthal thermal uniformity of a substrate are provided herein. In some embodiments, a substrate support for use in a semiconductor process chamber includes a susceptor plate; and a supporting member to support a backside of the susceptor plate proximate an outer edge thereof, wherein the supporting member substantially covers the backside of the susceptor plate. In some embodiments, the substrate support is disposed in a process chamber having at least some lamps disposed below the supporting member and utilized for heating the back side of the susceptor plate.
    Type: Grant
    Filed: October 2, 2008
    Date of Patent: June 21, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Kailash Kiran Patalay, Jean R. Vatus, Dean Berlin
  • Publication number: 20100255661
    Abstract: Methods of depositing layers having reduced interfacial contamination are disclosed herein. The inventive methods may advantageously reduce contamination at the interface between deposited layers, for example, between a deposited layer and an underlying substrate or film. In some embodiments, a method of depositing a layer may include annealing a silicon-containing layer having a first layer disposed thereon in a reducing atmosphere; removing the first layer using an etching process to expose the silicon-containing layer after annealing; and depositing a second layer on the exposed silicon-containing layer.
    Type: Application
    Filed: March 4, 2010
    Publication date: October 7, 2010
    Applicant: APPLIED MATERIALS, INC.
    Inventors: JEAN R. VATUS, JINSONG TANG, YIHWAN KIM, SATHEESH KUPPURAO, ERROL SANCHEZ
  • Publication number: 20100120259
    Abstract: Methods and apparatus for controlling temperature and flow characteristics of process gases in a process chamber have been provided herein. In some embodiments, an apparatus for controlling temperature and flow characteristics of a process gas in a process chamber may include a gas pre-heat ring configured to be disposed about a substrate and having a labyrinthine conduit disposed therein, wherein the labyrinthine conduit has an inlet and outlet to facilitate the flow of the process gas therethrough.
    Type: Application
    Filed: November 13, 2008
    Publication date: May 13, 2010
    Applicant: APPLIED MATERIALS, INC.
    Inventors: JEAN R. VATUS, Kailash Kiran Patalay
  • Publication number: 20100086784
    Abstract: Methods and apparatus for providing an improved azimuthal thermal uniformity of a substrate are provided herein. In some embodiments, a substrate support for use in a semiconductor process chamber includes a susceptor plate; and a supporting member to support a backside of the susceptor plate proximate an outer edge thereof, wherein the supporting member substantially covers the backside of the susceptor plate. In some embodiments, the substrate support is disposed in a process chamber having at least some lamps disposed below the supporting member and utilized for heating the back side of the susceptor plate.
    Type: Application
    Filed: October 2, 2008
    Publication date: April 8, 2010
    Applicant: APPLIED MATERIALS, INC.
    Inventors: KAILASH KIRAN PATALAY, Jean R. Vatus, Dean Berlin
  • Patent number: 7651948
    Abstract: A method for processing a substrate including a pre-cleaning etch and reduced pressure process is disclosed. The pre-cleaning process involves introducing a substrate into a processing chamber; flowing an etching gas into the processing chamber; processing at least a portion of the substrate with the etching gas to remove a contaminated or damaged layer from a substrate surface; stopping flow of the etching gas; evacuating the processing chamber to achieve a reduced pressure in the chamber; and processing the substrate surface at the reduced pressure. Epitaxial deposition is then used to form an epitaxial layer on the substrate surface.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: January 26, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Yihwan Kim, Jean R. Vatus, Lori D. Washington, Arkadii Samoilov, Ali Zojaji
  • Publication number: 20090272719
    Abstract: A pedestal positioning assembly system for use in a substrate processing system includes a pedestal rigidly attached to a pedestal shaft, a reference rigidly attached to the substrate processing system, a lateral adjustment assembly to adjust a lateral location of the pedestal relative to the reference, and a vertical adjustment assembly to adjust a tilt of the pedestal relative to the reference. The lateral adjustment assembly and the vertical adjustment assembly are external to a processing chamber and are coupled to the pedestal disposed within the processing chamber through the pedestal shaft. The reference can be a ring and the lateral adjustment assembly substantially centers the pedestal within the ring. A method of adjusting a pedestal includes leveling the pedestal, translating the pedestal, calibrating the pedestal height to a preheat ring level, and checking the level and location of the pedestal while rotating the pedestal.
    Type: Application
    Filed: September 26, 2008
    Publication date: November 5, 2009
    Applicant: Applied Materials, Inc.
    Inventors: Richard O. Collins, Kailash Kiran Patalay, Jean R. Vatus, Zhepeng Cong
  • Publication number: 20090276097
    Abstract: A substrate processing system includes an optical measurement assembly coupled to an exterior of a processing chamber that has a portion that is transparent. The processing chamber includes a reference object and a pedestal for supporting a work piece. The optical measurement assembly measures a lateral location, a height and a tilt of the pedestal by transmitting light into the processing chamber through the transparent portion of the processing chamber and detecting a reflected light from both the reference object and the portion of the pedestal after the reflected light leaves the chamber through the transparent portion of the processing chamber. A method of adjusting a pedestal includes analyzing the reflected light and leveling the pedestal, translating the pedestal, calibrating the pedestal height to a preheat ring level, and checking the level and location of the pedestal in response to the analyzed reflected light.
    Type: Application
    Filed: September 26, 2008
    Publication date: November 5, 2009
    Applicant: Applied Materials, Inc.
    Inventors: Kailash Kiran Patalay, Richard O. Collins, Jean R. Vatus, Zhepeng Cong
  • Publication number: 20080245767
    Abstract: A method for processing a substrate including a pre-cleaning etch and reduced pressure process is disclosed. The pre-cleaning process involves introducing a substrate into a processing chamber; flowing an etching gas into the processing chamber; processing at least a portion of the substrate with the etching gas to remove a contaminated or damaged layer from a substrate surface; stopping flow of the etching gas; evacuating the processing chamber to achieve a reduced pressure in the chamber; and processing the substrate surface at the reduced pressure. Epitaxial deposition is then used to form an epitaxial layer on the substrate surface.
    Type: Application
    Filed: June 30, 2006
    Publication date: October 9, 2008
    Inventors: Yihwan Kim, Jean R. Vatus, Lori D. Washington, Arkadii Samoilov, Ali Zojaji
  • Patent number: 6876442
    Abstract: A method is provided wherein a temperature reading error of a pyrometer is avoided. An upper pyrometer is used to detect infrared radiation from a test layer formed on a test substrate under standard processing conditions. The infrared radiation from the test layer has a period having a length which is indicative of growth rate of the layer. The period is generally inversely proportional to the growth rate. The growth rate is directly related to the temperature.
    Type: Grant
    Filed: February 13, 2002
    Date of Patent: April 5, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Jean R. Vatus, David K. Carlson, Arkadii V. Samoilov, Lance A. Scudder, Paul B. Comita, Annie A. Karpati
  • Publication number: 20040175893
    Abstract: A method of making a substantially facet-free epitaxial film is disclosed. A substrate having predetermined regions is first provided. An epitaxial film forming process gas and a carrier gas are introduced into a reactor chamber. The epitaxial film forming process gas and the carrier have a flow ratio between 1:1 and 1:200. The epitaxial film is deposited into the predetermined regions of the substrate wherein the substrate has a temperature between about 350° C. and about 900° C. when the epitaxial film is being deposited.
    Type: Application
    Filed: March 7, 2003
    Publication date: September 9, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Jean R. Vatus, Lance A. Scudder, Paul B. Comita