Abstract: A transistor power switch device comprising an array of vertical transistor elements for carrying current between first and second faces of a semiconductor body. The device also comprises a semiconductor monitor element comprising first and second semiconductor monitor regions in the semiconductor body and a monitor conductive layer distinct from the current carrying conductive layer of the transistor array. The semiconductor monitor element presents semiconductor properties representative of the transistor array. Characteristics of the semiconductor monitor element are measured as representative of characteristics of the transistor array. Source metal ageing of a transistor power switch device is monitored by measuring and recording a parameter which is a function of a sheet resistance of the monitor conductive layer when the transistor power switch device is new and comparing it with its value after operation of the device.