Patents by Inventor Jean Vatus

Jean Vatus has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8951351
    Abstract: Methods and apparatus for reducing autodoping and backside defects on a substrate during epitaxial deposition processes are provided herein. In some embodiments, an apparatus for reducing autodoping and backside defects on a substrate includes a substrate support ring having a substrate holder structure configured to support the substrate in a position for processing along an edge defined by the backside of the substrate and a sidewall of the substrate or along a plurality of discrete points on or proximate to the edge; and a spacer ring for positioning the substrate support ring above a susceptor plate to define a substrate gap region between the susceptor plate and the backside of the substrate, the spacer ring comprising a plurality of openings formed therethrough that facilitate passage of a gas into and out of the substrate gap region.
    Type: Grant
    Filed: October 5, 2007
    Date of Patent: February 10, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Kailash Kiran Patalay, Craig Metzner, Jean Vatus
  • Publication number: 20140318442
    Abstract: An epitaxial reactor enabling simultaneous deposition of thin films on a multiplicity of wafers is disclosed. During deposition, a number of wafers are contained within a wafer sleeve comprising a number of wafer carrier plates spaced closely apart. Process gases flow preferentially into the interior volume of the wafer sleeve, which is heated by one or more lamp modules. To improve uniformity, the direction of process gas flow may be varied in a cross-flow configuration and the wafers may be mounted at a small angle to the plane of the wafer carrier plates, wherein the wafers are configured in pairs along the direction of gas flow and wherein along the direction of gas flow the angular mounting of the wafers provides a smaller gap between opposed wafer surfaces on said parallel wafer carrier plates in the center of said wafer sleeve than at the periphery of said wafer sleeve.
    Type: Application
    Filed: March 17, 2014
    Publication date: October 30, 2014
    Applicant: Crystal Solar Incorporated
    Inventors: Visweswaren Sivaramakrishnan, Jean Vatus, Andrzej Kaszuba, Vicente Lim, Ashish Asthana
  • Patent number: 8747560
    Abstract: A pedestal positioning assembly system for use in a substrate processing system includes a pedestal rigidly attached to a pedestal shaft, a reference rigidly attached to the substrate processing system, a lateral adjustment assembly to adjust a lateral location of the pedestal relative to the reference, and a vertical adjustment assembly to adjust a tilt of the pedestal relative to the reference. The lateral adjustment assembly and the vertical adjustment assembly are external to a processing chamber and are coupled to the pedestal disposed within the processing chamber through the pedestal shaft. The reference can be a ring and the lateral adjustment assembly substantially centers the pedestal within the ring. A method of adjusting a pedestal includes leveling the pedestal, translating the pedestal, calibrating the pedestal height to a preheat ring level, and checking the level and location of the pedestal while rotating the pedestal.
    Type: Grant
    Filed: February 13, 2013
    Date of Patent: June 10, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Richard Collins, Kailash Kiran Patalay, Jean Vatus, Zhepeng Cong
  • Publication number: 20080066684
    Abstract: Methods and apparatus for reducing autodoping and backside defects on a substrate during epitaxial deposition processes are provided herein. In some embodiments, an apparatus for reducing autodoping and backside defects on a substrate includes a substrate support ring having a substrate holder structure configured to support the substrate in a position for processing along an edge defined by the backside of the substrate and a sidewall of the substrate or along a plurality of discrete points on or proximate to the edge; and a spacer ring for positioning the substrate support ring above a susceptor plate to define a substrate gap region between the susceptor plate and the backside of the substrate, the spacer ring comprising a plurality of openings formed therethrough that facilitate passage of a gas into and out of the substrate gap region.
    Type: Application
    Filed: October 5, 2007
    Publication date: March 20, 2008
    Applicant: APPLIED MATERIALS, INC.
    Inventors: KAILASH KIRAN PATALAY, Craig Metzner, Jean Vatus
  • Patent number: 4742026
    Abstract: The invention pertains to a method for the selective etching of a surface layer which is automatically stopped at a subjacent layer.According to the invention, a first layer of a material containing gallium is selectively etched with respect to a second layer containing aluminium by reactive ion etching in the presence of a pure freon plasma C Cl.sub.2 F.sub.2. At low pressures (0.5 to 2.5 pascals), the etching is anisotropic and makes it possible to etch the gate recess of a field effect transistor. At a higher pressure (6 to 10 pascals), the etching is isotropic and makes it possible to sub-etch the first layer.Application to the manufacture of field effect transistors made of group III-V materials, with low access resistances.
    Type: Grant
    Filed: April 27, 1987
    Date of Patent: May 3, 1988
    Assignee: Thomson-CSF
    Inventors: Jean Vatus, Jean Chevrier