Abstract: In order to move data blocks from a source memory unit (8, 9, 12) to a target memory unit (12, 8, 9) by means of a data path (5, 6, 7), wherein the blocks moved are not necessarily framed in the blocks of the source memory and the target memory, an electrical circuit makes it possible to perform a framing with a granularity equal to the width of the data path. To reduce latency, the framing is done by a shift register with a storage capacity reduced to that of a single block.

Abstract: In order to allow an external memory space to enter into the memory space of a microprocessor (43) comprising a cache memory (94), an integrated circuit (42) serves as an interface between the microprocessor (43) and a memory unit (8, 9, 12) constituting the external memory space. The integrated circuit (42) comprises a stack (91) sized for containing a data block from the memory unit (8, 9, 12) such that the block from the memory unit (8, 9, 12) is seen as one or more blocks in the cache memory (94), and a register (93) belonging to the memory space of the microprocessor (43) adapted to contain the coordinates for access to the memory unit (8, 9, 12).