Patents by Inventor Jean-Yves Duboz

Jean-Yves Duboz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200203556
    Abstract: The invention relates to a method of manufacturing at least one optoelectronic structure on a support substrate. In particular, this invention relates to manufacturing of an optoelectronic structure that has a plurality of coplanar light emitting diodes, and formed from a succession of light emitting stacks. Therefore this invention uses a cavity, the bottom of which has a staged profile, such that the formation of the succession of light emitting stacks reproduces the staged profile of the bottom of the cavity, on its exposed face. Performance of a step to level the succession of light emitting stacks relative to a reference level defined by the exposed surface portion vertically in line with the deepest step, then makes it possible to reveal a set of coplanar light emitting diodes.
    Type: Application
    Filed: December 16, 2019
    Publication date: June 25, 2020
    Applicants: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE
    Inventors: Guy FEUILLET, Benjamin DAMILANO, Jean-Yves DUBOZ, Christophe LARGERON
  • Patent number: 10103195
    Abstract: A pixel comprises three adjacent sub-pixels, formed by respective stacks of semi-conducting layers wherein: each sub-pixel comprises a first active layer, adapted for emitting a light at a first wavelength when an electric current passes through it; another sub-pixel comprises a second active layer, adapted for emitting a light at a second wavelength greater than the first wavelength; another sub-pixel comprises a third active layer, adapted for emitting a light at a third wavelength greater than the first wavelength and different from the second wavelength; at least one from among the second and third active layers being adapted for emitting light when it is excited by the light at the first wavelength emitted by the first active layer of the same sub-pixel. Semi-conducting structure and methods for the fabrication of such a pixel are provided.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: October 16, 2018
    Assignee: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE
    Inventors: Benjamin Damilano, Jean-Yves Duboz
  • Publication number: 20170213868
    Abstract: A pixel comprises three adjacent sub-pixels, formed by respective stacks of semi-conducting layers wherein: each sub-pixel comprises a first active layer, adapted for emitting a light at a first wavelength when an electric current passes through it; another sub-pixel comprises a second active layer, adapted for emitting a light at a second wavelength greater than the first wavelength; another sub-pixel comprises a third active layer, adapted for emitting a light at a third wavelength greater than the first wavelength and different from the second wavelength; at least one from among the second and third active layers being adapted for emitting light when it is excited by the light at the first wavelength emitted by the first active layer of the same sub-pixel. Semi-conducting structure and methods for the fabrication of such a pixel are provided.
    Type: Application
    Filed: March 27, 2015
    Publication date: July 27, 2017
    Inventors: Benjamin DAMILANO, Jean-Yves DUBOZ
  • Patent number: 7785991
    Abstract: A process is provided for integrating a III-N component, such as GaN, on a (001) or (100) nominal silicon substrate. There are arranged a texture of elementary areas each comprising an individual surface, with the texture comprising at least one hosting area intended to receive a III-N component. A mask layer is deposited on non-hosting areas which are not intended to receive a III-N type component. The hosting area is locally prepared so as to generate on the surface of the area one domain comprising one single type of terrace. There is grown by Molecular Beam Epitaxy or Metalorganic Vapor Phase Epitaxy on the hosting area one intermediary AlN buffer layer, followed by the growth of one III-N based material so as to realize a substantially monocrystalline structure. There is eliminated the mask layer located on non-hosting areas as well as surface polycrystalline layers deposited above the mask layers, and MOS/CMOS structures are subsequent integrated on at least some of the non-hosting areas.
    Type: Grant
    Filed: November 16, 2007
    Date of Patent: August 31, 2010
    Assignee: STMicroelectronics SA
    Inventors: Sylvain Joblot, Fabrice Semond, Jean Massies, Yvon Cordier, Jean-Yves Duboz
  • Publication number: 20080149936
    Abstract: A process is provided for integrating a III-N component, such as GaN, on a (001) or (100) nominal silicon substrate. There are arranged a texture of elementary areas each comprising an individual surface, with the texture comprising at least one hosting area intended to receive a III-N component. A mask layer is deposited on non-hosting areas which are not intended to receive a III-N type component. The hosting area is locally prepared so as to generate on the surface of the area one domain comprising one single type of terrace. There is grown by Molecular Beam Epitaxy or Metalorganic Vapor Phase Epitaxy on the hosting area one intermediary AlN buffer layer, followed by the growth of one III-N based material so as to realize a substantially monocrystalline structure. There is eliminated the mask layer located on non-hosting areas as well as surface polycrystalline layers deposited above the mask layers, and MOS/CMOS structures are subsequent integrated on at least some of the non-hosting areas.
    Type: Application
    Filed: November 16, 2007
    Publication date: June 26, 2008
    Applicant: STMICROELECTRONICS SA
    Inventors: SYLVAIN JOBLOT, Fabrice Semond, Jean Massies, Yvon Cordier, Jean-Yves Duboz
  • Patent number: 5818066
    Abstract: An optoelectronic quantum well device comprises a stack of layers that have different gap widths and constitute quantum wells possessing, in the conduction band, at least two permitted energy levels, this stack of layers being included between two reflection means. The device also comprises a diffraction grating between one of the mirrors and the stack of layers.
    Type: Grant
    Filed: November 18, 1996
    Date of Patent: October 6, 1998
    Assignee: Thomson-CSF
    Inventor: Jean-Yves Duboz
  • Patent number: 5726500
    Abstract: Semiconductor hybrid components, especially linear infrared detectors produced by hybridization. A main substrate has integrated thereon active elements which cannot be produced on a silicon substrate. The substrate is made, for example, of AsGa, InP, HgCdTe or PbTe. Several silicon chips are mounted on the main substrate, by hybridization using indium balls. These chips include the read and multiplexing circuits. The silicon chips remain of limited size (a few millimeters) so that the differential thermal expansion stresses are limited, but the detection array may be produced as one piece without butt-joining. It is therefore possible to produce arrays of great length (several centimeters) and of high resolution (at least a thousand points).
    Type: Grant
    Filed: December 7, 1995
    Date of Patent: March 10, 1998
    Assignee: Thomson-CSF
    Inventors: Jean-Yves Duboz, Emmanuel Rosencher, Philippe Bois
  • Patent number: 5719670
    Abstract: Disclosed is an integrated direction finder that can be used to determine the direction of a light beam and, in particular, a laser beam. This direction finder has a substrate transparent to the light beam and means on the rear face to channel a part of the light flux received on this face to the front face which has several photodetector elements. Application to optical measurements.
    Type: Grant
    Filed: November 8, 1995
    Date of Patent: February 17, 1998
    Assignee: Thomson-CSF
    Inventors: Jean-Yves Duboz, Philippe Bois
  • Patent number: 5712499
    Abstract: A photodetector arrangement capable of detecting high-power-light flux and including a set of elementary photodetectors each one of which is individually tested to determine that it has no defects. Each of the photodetectors which is found to be free of objectionable defects is connected in parallel to a common conducting line to thus produce a combined output when radiation impinges on the detector surface. The connection can be hard wired or provided through a set of transistors acting as connection control intermediaries between the good photodetectors and the common conducting line. The active areas of only good photodetectors are thus combined to form a large photodetector area of any desired shape or size without the usual reliability problems. The selective control of the transistors can further be provided by auxiliary control photodetectors to additionally automatically control the size of the active area in response to the area of light being detected or a control light beam.
    Type: Grant
    Filed: November 8, 1995
    Date of Patent: January 27, 1998
    Assignee: Thomson-CSF
    Inventors: Jean-Yves Duboz, Philippe Bois
  • Patent number: 5677544
    Abstract: Quantum well detector, in which the active detection zone (2) occupies only a limited area of the device and in which a diffraction grid (5) having a larger surface area than this zone thereby makes it possible to couple to it a greater light flow than that corresponding to the surface area of this zone. In this way, the sensitivity of the device is increased.Application: Detection of optical radiation.
    Type: Grant
    Filed: September 9, 1994
    Date of Patent: October 14, 1997
    Assignee: Thomson-CSF
    Inventors: Jean-Yves Duboz, Fran.cedilla.ois Luc, Philippe Bois
  • Patent number: 5140381
    Abstract: An optical detection device with a variable detection threshold. The optical detection device comprises at least one element having a heterostructure on a substrate, the heterostructure incorporating two conducting layers and, between the latter, a semiconducting layer forming a potential barrier with each of the conducting layers is provided. Excited electrons are formed when the heterostructure is illuminated by light radiation, whose energy is at least equal to the detection threshold of the heterostructure. This makes it possible to detect the radiation by an internal photoemission of electrons between one conducting layer and the other. The device also comprises variable biasing of the heterostructure, the biasing making it possible to vary the detection spectrum and threshold of the device. The optical detection device finds particular application to the detection of infrared radiation.
    Type: Grant
    Filed: March 20, 1991
    Date of Patent: August 18, 1992
    Assignee: France Telecom-Etablissement autonome de droit public(Centre National d'Etudes des Telecommunications)
    Inventors: Pierre A. Badoz, Jean-Yves Duboz