Abstract: A method and apparatus for reducing power consumption of a receiver of a communications device that does not change the global hardware of the device and uses the current master clock to lower the clock frequency. In an example embodiment, a method directed to reducing power consumption of a receiver of a communications device during an idle state. The receiver has an internal power source and a corresponding base unit. The method includes generating a clock signal that has an output frequency that varies, the frequency being higher in an active state and lower in an inactive state, such that the receiver consumes more power during the active state then when in the inactive state. Power consumption by the receiver is reduced by dynamically and synchronously switching the clock frequency to a lower clock frequency. Receiver power consumption is a function of the power consumed during the active and inactive states and the duration of the idle state.