Abstract: Systems and methods described herein provide for testing and debugging different subsystems of an embedded controller using a testing architecture. The testing architecture can simulate messaging interfaces between internal subsystems of the embedded controller and external subsystems the controllers interacts with to integrate various types of software. A method includes generating test support models for one or more subsystems and establishing a communications network between the test support models and a control module of the embedded controller. A clock signal is generated to initiate processing within the testing architecture between the control module and the test support models. An event model is executed at the test support models using the clock signal and data is generated at one or more of the test support models responsive to the event model. The data can correspond to operational parameters of a respective system the embedded controller.

Abstract: Systems and methods described herein provide for testing and debugging different subsystems of an embedded controller using a testing architecture. The testing architecture can simulate messaging interfaces between internal subsystems of the embedded controller and external subsystems the controllers interacts with to integrate various types of software. A method includes generating test support models for one or more subsystems and establishing a communications network between the test support models and a control module of the embedded controller. A clock signal is generated to initiate processing within the testing architecture between the control module and the test support models. An event model is executed at the test support models using the clock signal and data is generated at one or more of the test support models responsive to the event model. The data can correspond to operational parameters of a respective system the embedded controller.