Patents by Inventor Jeanne Pavio

Jeanne Pavio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080093718
    Abstract: A semiconductor component having a semiconductor chip mounted on a packaging substrate and a method for manufacturing the semiconductor component that uses batch processing steps for fabricating the packaging substrate. A heatsink is formed using an injection molding process. The heatsink has a front surface for mating with a semiconductor chip and a leadframe assembly. The heatsink also has a back surface from which a plurality of fins extend. The leadframe assembly includes a leadframe having leadframe leads extending from opposing sides of the leadframe to a central area of the leadframe. A liquid crystal polymer is disposed in a ring-shaped pattern on the leadframe leads. The liquid crystal polymer is partially cured. The leadframe assembly is mounted on the front surface of the heatsink and the liquid crystal polymer is further cured to form a packaging assembly, which is then singulated into packaging substrates.
    Type: Application
    Filed: December 18, 2007
    Publication date: April 24, 2008
    Applicant: HVVI SEMICONDUCTORS, INC.
    Inventor: Jeanne Pavio
  • Publication number: 20070090434
    Abstract: A power transistor includes a plurality of transistor cells. Each transistor cell has a first electrode coupled to a first electrode interconnection region overlying a first major surface, a control electrode coupled to a control electrode interconnection region overlying the first major surface, and a second electrode coupled to a second electrode interconnection region overlying a second major surface. Each transistor cell has an approximately constant doping concentration in the channel region. A dielectric platform is used as an edge termination of an epitaxial layer to maintain substantially planar equipotential lines therein. The power transistor finds particular utility in radio frequency applications operating at a frequency greater than 500 megahertz and dissipating more than 5 watts of power. The semiconductor die and package are designed so that the power transistor can efficiently operate under such severe conditions.
    Type: Application
    Filed: March 23, 2006
    Publication date: April 26, 2007
    Inventors: Robert Davies, Warren Seely, Jeanne Pavio
  • Publication number: 20060189038
    Abstract: A semiconductor component having a semiconductor chip mounted on a packaging substrate and a method for manufacturing the semiconductor component that uses batch processing steps for fabricating the packaging substrate. A heatsink is formed using an injection molding process. The heatsink has a front surface for mating with a semiconductor chip and a leadframe assembly. The heatsink also has a back surface from which a plurality of fins extend. The leadframe assembly includes a leadframe having leadframe leads extending from opposing sides of the leadframe to a central area of the leadframe. A liquid crystal polymer is disposed in a ring-shaped pattern on the leadframe leads. The liquid crystal polymer is partially cured. The leadframe assembly is mounted on the front surface of the heatsink and the liquid crystal polymer is further cured to form a packaging assembly, which is then singulated into packaging substrates.
    Type: Application
    Filed: January 6, 2006
    Publication date: August 24, 2006
    Inventor: Jeanne Pavio