Patents by Inventor Jeannette Zarbock

Jeannette Zarbock has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11284027
    Abstract: A pixel circuit wherein a pixel arrangement comprises a pixel comprising a photodetector, an integrator for accumulating a signal from the photodetector, a source following output transistor for amplifying the integrated signal, and a current source for applying a readout current through the output transistor, a voltage regulating circuit comprising an amplifier, a replica transistor dimensioned substantially the same as the output transistor, and a replica current source for providing substantially the readout current through each replica transistor, a gate of the replica transistor is connected with an output node of the amplifier connected with the pixel arrangement, and a source of the replica transistor is connected with a negative input of the amplifier, and with the replica current source, a predefined reference voltage is applicable to a positive input.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: March 22, 2022
    Assignee: MELEXIS TECHNOLOGIES NV
    Inventors: Andreas Bonin, Darrell Livezey, Jeannette Zarbock, Liqun Wu, Volodymyr Seliuchenko
  • Publication number: 20200288075
    Abstract: A pixel circuit wherein a pixel arrangement comprises a pixel comprising a photodetector, an integrator for accumulating a signal from the photodetector, a source following output transistor for amplifying the integrated signal, and a current source for applying a readout current through the output transistor, a voltage regulating circuit comprising an amplifier, a replica transistor dimensioned substantially the same as the output transistor, and a replica current source for providing substantially the readout current through each replica transistor, a gate of the replica transistor is connected with an output node of the amplifier connected with the pixel arrangement, and a source of the replica transistor is connected with a negative input of the amplifier, and with the replica current source, a predefined reference voltage is applicable to a positive input.
    Type: Application
    Filed: March 6, 2020
    Publication date: September 10, 2020
    Inventors: Andreas BONIN, Darrell LIVEZEY, Jeannette ZARBOCK, Liqun WU, Volodymyr SELIUCHENKO
  • Patent number: 9560673
    Abstract: An example method of assessing one more communication channels includes receiving an indication to initiate channel assessment, receiving a user-selected first set of assessment parameters, and determining whether or not the first communication channel is busy based on the first set of assessment parameters. The method also includes replacing the first set of assessment parameters with a user-selected second set of assessment parameters, and determining whether or not the second communication channel is busy based on the second set of assessment parameters.
    Type: Grant
    Filed: November 4, 2014
    Date of Patent: January 31, 2017
    Assignee: Atmel Corporation
    Inventors: Thomas Hanusch, Udo Walter, Jeannette Zarbock
  • Publication number: 20160128070
    Abstract: An example method of assessing one more communication channels includes receiving an indication to initiate channel assessment, receiving a user-selected first set of assessment parameters, and determining whether or not the first communication channel is busy based on the first set of assessment parameters. The method also includes replacing the first set of assessment parameters with a user-selected second set of assessment parameters, and determining whether or not the second communication channel is busy based on the second set of assessment parameters.
    Type: Application
    Filed: November 4, 2014
    Publication date: May 5, 2016
    Inventors: Thomas Hanusch, Udo Walter, Jeannette Zarbock
  • Publication number: 20120236674
    Abstract: A circuit and method for operating a circuit is provided that includes a circuit section that has a number of memory elements, a first voltage regulator that can be connected or is connected to the circuit section in order to operate the circuit section, a second voltage regulator that can be connected or is connected to the circuit section in order to preserve an information item stored in the memory elements, a switching device that is connected to the circuit section and is designed to deactivate and activate inputs of the circuit section. The circuit being configured to control a deactivation and activation of the first voltage regulator and the deactivation and activation of the inputs of the circuit section.
    Type: Application
    Filed: May 31, 2012
    Publication date: September 20, 2012
    Inventors: Wolfram Kluge, Jeannette Zarbock, Tilo Ferchland
  • Patent number: 8193792
    Abstract: A circuit and method for operating a circuit is provided that includes a circuit section that has a number of memory elements, a first voltage regulator that can be connected or is connected to the circuit section in order to operate the circuit section, a second voltage regulator that can be connected or is connected to the circuit section in order to preserve an information item stored in the memory elements, a switching device that is connected to the circuit section and is designed to deactivate and activate inputs of the circuit section. The circuit being configured to control a deactivation and activation of the first voltage regulator and the deactivation and activation of the inputs of the circuit section.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: June 5, 2012
    Assignee: Amtel Corporation
    Inventors: Wolfram Kluge, Jeannette Zarbock, Tilo Ferchland
  • Patent number: 7890078
    Abstract: A dual band WLAN (Wireless Local Area Network) communications technique is provided where a frequency synthesizer unit generates an LO (Local Oscillator) signal at a frequency between both frequency bands and two downconversion units and/or two upconversion units are provided. One of the units performs conversion between the LO signal and an IF (Intermediate Frequency) signal while the other conversion takes place between the IF signal and a zero-IF or low-IF signal. Signal processing is performed on the zero-IF or low-IF signal.
    Type: Grant
    Filed: January 25, 2010
    Date of Patent: February 15, 2011
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Wolfram Kluge, Sascha Beyer, Jeannette Zarbock
  • Patent number: 7868679
    Abstract: A circuit is provided that includes an input for a clock signal, a random event generator for outputting a random signal, in particular random numbers, a settable delay device that is connected to the input for the clock signal and is connected to the random event generator for the purpose of setting a delay of an edge of the clock signal (clk) by means of the random signal.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: January 11, 2011
    Assignee: Atmel Automotive GmbH
    Inventors: Thorsten Riedel, Jeannette Zarbock, Tilo Ferchland
  • Publication number: 20100118854
    Abstract: A dual band WLAN (Wireless Local Area Network) communications technique is provided where a frequency synthesizer unit generates an LO (Local Oscillator) signal at a frequency between both frequency bands and two downconversion units and/or two upconversion units are provided. One of the units performs conversion between the LO signal and an IF (Intermediate Frequency) signal while the other conversion takes place between the IF signal and a zero-IF or low-IF signal. Signal processing is performed on the zero-IF or low-IF signal.
    Type: Application
    Filed: January 25, 2010
    Publication date: May 13, 2010
    Inventors: WOLFRAM KLUGE, SASCHA BEYER, JEANNETTE ZARBOCK
  • Patent number: 7653361
    Abstract: A dual band WLAN (Wireless Local Area Network) communications technique is provided where a frequency synthesizer unit generates an LO (Local Oscillator) signal at a frequency between both frequency bands and two downconversion units and/or two upconversion units are provided. One of the units performs conversion between the LO signal and an IF (Intermediate Frequency) signal while the other conversion takes place between the IF signal and a zero-IF or low-IF signal. Signal processing is performed on the zero-IF or low-IF signal.
    Type: Grant
    Filed: June 22, 2005
    Date of Patent: January 26, 2010
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Wolfram Kluge, Sascha Beyer, Jeannette Zarbock
  • Publication number: 20090302821
    Abstract: A circuit and method for operating a circuit is provided that includes a circuit section that has a number of memory elements, a first voltage regulator that can be connected or is connected to the circuit section in order to operate the circuit section, a second voltage regulator that can be connected or is connected to the circuit section in order to preserve an information item stored in the memory elements, a switching device that is connected to the circuit section and is designed to deactivate and activate inputs of the circuit section. The circuit being configured to control a deactivation and activation of the first voltage regulator and the deactivation and activation of the inputs of the circuit section.
    Type: Application
    Filed: June 9, 2009
    Publication date: December 10, 2009
    Inventors: Wolfram KLUGE, Jeannette Zarbock, Tilo Ferchland
  • Publication number: 20090302920
    Abstract: A circuit is provided that includes an input for a clock signal, a random event generator for outputting a random signal, in particular random numbers, a settable delay device that is connected to the input for the clock signal and is connected to the random event generator for the purpose of setting a delay of an edge of the clock signal (clk) by means of the random signal.
    Type: Application
    Filed: June 9, 2009
    Publication date: December 10, 2009
    Inventors: Thorsten RIEDEL, Jeannette Zarbock, Tilo Ferchland
  • Publication number: 20060140315
    Abstract: A dual band WLAN (Wireless Local Area Network) communications technique is provided where a frequency synthesizer unit generates an LO (Local Oscillator) signal at a frequency between both frequency bands and two downconversion units and/or two upconversion units are provided. One of the units performs conversion between the LO signal and an IF (Intermediate Frequency) signal while the other conversion takes place between the IF signal and a zero-IF or low-IF signal. Signal processing is performed on the zero-IF or low-IF signal.
    Type: Application
    Filed: June 22, 2005
    Publication date: June 29, 2006
    Inventors: Wolfram Kluge, Sascha Beyer, Jeannette Zarbock