Patents by Inventor Jeannie H. Kosiec

Jeannie H. Kosiec has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Peak detector circuit
    Patent number: 5969545
    Abstract: A peak detector circuit (100) includes an output transconductance amplifier (102), a current rectifier (104) and an averaging circuit (108). The current rectifier includes an amplifier (115) which reduces input impedance of the current rectifier to increase the operating frequency of the peak detector circuit. An isolator (106) employs a current mirror (509) with a cascode transistor (512) having a bias potential which is dynamically adjusted to achieve accurate mirroring. An amplifier of a common mode feedback circuit (110) has improved linearity.
    Type: Grant
    Filed: January 23, 1998
    Date of Patent: October 19, 1999
    Assignee: Motorola, Inc.
    Inventors: Kamran Assadian, Jeannie H. Kosiec
  • Phase synchronization circuit and method therefor for a phase locked loop
    Patent number: 5497126
    Abstract: An improved phase synchronization circuit (301) and method therefor for a phase locked loop (300). Each of a divided reference frequency signal (206) and a feedback signal (209) is held in a predetermined state. The divided reference frequency signal (206) is enabled responsive to the phase of a reference frequency signal (115). A phase relationship between the reference frequency signal (115) and an output frequency signal (116 or 117) is determined. The feedback signal (209) is enabled responsive to enabling the divided reference frequency signal (206) and the determined phase relationship. The present invention advantageously provides a rapid and accurate phase synchronization for the PLL (300) with minimum additional hardware and without introducing phase error into the PLL (300).
    Type: Grant
    Filed: November 9, 1993
    Date of Patent: March 5, 1996
    Assignee: Motorola, Inc.
    Inventors: Jeannie H. Kosiec, Steven F. Gillig
  • Operational transconductance amplifier track and hold system
    Patent number: 5483687
    Abstract: A voltage track and hold circuit operates to track a tuning voltage and holding the tuning voltage (404) as a reference voltage (408). In the track mode, the track and hold circuit includes a first operational transconductance amplifier (401) and a first charge storage device (402) coupled to a first input (403) of the first operational transconductance amplifier (401). The first charge storage device (402) accumulates a charge that corresponds with the tuning voltage (404). A second charge storage device (405) is coupled to a second input (406) and an output (407) of the first operational transconductance amplifier (401). The second charge storage device (405) accumulates a reference charge such that the reference voltage (408) present at the second charge storage device (405) is substantially equivalent to the tuning voltage (404).
    Type: Grant
    Filed: November 10, 1993
    Date of Patent: January 9, 1996
    Assignee: Motorola, Inc.
    Inventors: Raymond L. Barrett, Jr., Barry Herold, Jeannie H. Kosiec
  • Current mirror having increased output swing
    Patent number: 5142696
    Abstract: A current mirror having improved turn-on and turn-off characteristics capable of operation an expanded voltage range. A cascode circuit comprising a portion of the current mirror is of a high characteristic impedance to increase thereby the voltages over which the current mirror may generate a constant current output. A switching circuit comprised of tandemly-positioned transistors having differing transistor characteristics decreases the transistor turn-on and turn-off times to enhance the characteristics of the current mirror.
    Type: Grant
    Filed: April 16, 1991
    Date of Patent: August 25, 1992
    Assignee: Motorola, Inc.
    Inventors: Jeannie H. Kosiec, Steven F. Gillig