Abstract: The specification discloses semiconductor switching devices having more than five layers of alternating semiconductor conductivity types and which do not utilize substantial lateral switching currents during the operation thereof. Ones of the exterior layers of the devices are heavily doped. In one embodiment of the invention, an asymmetrical regenerative semiconductor switch is disclosed which operates in the general manner of a silicon controlled rectifier but which includes two blocking junctions therein. In another embodiment of the invention, a semiconductor switching device having symmetrical switching operation is disclosed.

Abstract: The specification discloses a lateral diac including a semiconductor body having three alternating layers of first and second opposite conductivity types of semiconductor material. An isolating member such as a groove is disposed through one of the exterior semiconductor layers in order to geometrically and electrically isolate the layer into two regions. Electrodes are attached to each of the isolated regions and are disposed in the same plane for connection to leads on a common surface. The lateral diac thus formed is normally in a nonconductive high impedance condition, but is operable in response to a predetermined breakover voltage applied across the electrodes to operate in an avalanche mode to break back to a negative resistance characteristic. The lateral construction of the diac enables the diac to be easily mounted for thick film use.

Abstract: The specification discloses semiconductor switching devices having more than five layers of alternating semiconductor conductivity types and which do not utilize substantial lateral switching currents during the operation thereof. Ones of the exterior layers of the devices are heavily doped. In one embodiment of the invention, an asymmetrical regenerative semiconductor switch is disclosed which operates in the general manner of a silicon controlled rectifier but which includes two blocking junctions therein. In another embodiment of the invention, a semiconductor switching device having symmetrical switching operation is disclosed.

Abstract: A multilayer semiconductor switching device having alternating layers of opposite conductivity type is provided which is sensitive to impinging photon flux. The switching device has first, second and third electrodes and has a predetermined holding voltage. The switching device is constructed to receive photon flux from an external source and has variable output characteristics dependent upon the impinging photon flux. At least one photovoltaic device is disposed adjacent the semiconductor switching device for also receiving impinging photon flux and is connected across the first and second electrodes of the switching device. The photovoltaic device is operable in response to the impinging photon flux for generating a voltage greater than the holding voltage of the switching device and for applying the voltage across the first and second electrodes. The switching device generates base drive in response to the impinging photon flux.

Abstract: The specification discloses a multilayer semiconductor rectifier having an emitter gate, a cathode and an anode. In addition, the rectifier includes at least one region of semiconductor material electrically remote from the emitter gate. A second gate electrode contacts the region in order to provide additional switching control to the rectifier. In one embodiment of the invention, the second gate electrode may be biased to inhibit gating operation by the emitter gate electrode. Thus, switching signals may be applied to both the emitting gate and the second gate electrode in order to switch the rectifier. In another embodiment, gating signals may be applied to the emitter gate in order to render the rectifier conductive, while gating signals may be applied to the second gate electrode in order to render the rectifier nonconductive.

Abstract: An actuator-switch system formed on a unitary semiconductor body is provided which is sensitive to external stimuli. The semiconductor body includes at least five layers of alternating first and second semiconductor conductivity types, with structure extending through outer layers of the body to electrically isolate and separate the actuator from the switch. Upon sensing the eternal stimuli, the actuator injects carriers into at least one intermediate layer common to both the actuator and the switch to cause the switch to change states. Preferred embodiments include a magnetic sensitive device controlling the state of a flipflop, an inverter transistor sensitive to the state changes of the flipflop, and an SCR which when triggered by the inverter transistor injects carriers into a common intermediate layer to cause a switching action. Additional embodiments include an actuator powered by a D.C. source independent of the switch, and an actuator powered by D.C. voltages derived in part from a D.C.

Abstract: The specification discloses a technique for passivating a semiconductor device which includes exposing a P-N junction in a multilayered semiconductor body. A mixture of glass and gold is prepared and applied to the exposed P-N junction. A mixture is fired to fuse the glass and gold on the semiconductor body. The carrier lifetime degrading characteristics of the gold reduces the current leakage at the exposed P-N junction. The technique substantially improves the voltage capacity and stability of semiconductor switching devices.

Abstract: The specification discloses a semiconductor device package which includes a conductive heat sink support member which is bonded to a planar face of a ceramic body. A conductive pattern is formed on a second planar face of the ceramic body and includes at least two discrete pattern portions. A semiconductor switching device has at least first and second terminals on one side and a third terminal on the other side. The semiconductor switching device is bonded on the one side to the conductive pattern, with the first and second terminals contacting the two discrete portions of the conductive pattern. First and second conductive leads are bonded to the two discrete portions of the conductive pattern adjacent to the semiconductor switching device and extend outwardly from the ceramic body. A third conductive lead is bonded to the third terminal on the other side of the semiconductor device.

Abstract: The specification discloses a sensitive gate controlled rectifier including a semiconductor body having four layers of alternating opposite conductivity types. A first highly doped region of a first conductivity type is formed in a first exterior layer of the body of the first conductivity type. A second highly doped region of a second conductivity type is formed in the first exterior layer adjacent the first region. A first electrode electrically connects an internal layer of the second conductivity type with the first exterior layer and the first region to form a cathode. A second electrode connects to the second region to form a gate. A third electrode connects to a second exterior layer of the second conductivity type to form an anode.

Abstract: The specification discloses a slow speed semiconductor switching device including a body of semiconductor material having at least six layers of alternating opposite types of conductivity to form a plurality of P-N junctions. Anode and cathode electrodes are attached to exterior ones of the layers having opposite conductivity types. A gate electrode is connected to one of the layers for receiving a gating signal. The gating signal is of a predetermined level to cause more than one regenerative switching action within the body. In operation of the device, the total switching action of the body is sufficiently slow to substantially inhibit the generation of rf current by the body.

Abstract: The specification discloses semiconductor devices including a semiconductor body having layers of opposite conductivity types to form at least one P-N junction which intersects a face of the semiconductor body. A selected material spans the P-N junction in order to provide a nonohmic current path across the P-N junction, the conductance characteristics of the material being always positive. Electrodes contact the body to form an electrical switching device having improved operating characteristics over a wide temperature range. In the preferred embodiment, the material has a reverse breakdown higher than the forward conduction characteristics of the P-N junction and comprises a Schottky diode.

Abstract: The specification discloses a symmetrical semiconductor switch having a semiconductor body formed from a plurality of layers of alternating conductivity types to form a plurality of P-N junctions. Regions of one conductivity type are formed in the outer layers of the opposite conductivity type. Three electrodes contact the outer layers and the regions of the body to form a symmetrical semiconductor switch. Structure is provided on the outer layers of the body in order to degrade the lifetime of carriers which tend to move laterally across the switch in order to improve the switching time of the switch. In one embodiment, the structure comprises grooves formed in the outer layers of the body, the grooves being of sufficient width in order to substantially degrade the lifetime of carriers attempting to pass through layers adjacent the grooves. In another embodiment of the invention, carrier lifetime degrading material such as gold-doped glass is introduced into the body.

Abstract: The specification discloses a semiconductor switching device which includes heavily doped exterior layers of semiconductor material to provide rapid turn-on and turn-off actions in response to gate signals, while substantially reducing susceptibility to secondary breakdown and the occurrence of significant voltages across the device during a high conductivity mode. A preferred embodiment includes a six layer semiconductor device having a heavily doped P+ exterior layer in contact with an electrode to form an anode terminal, and a heavily doped N+ exterior layer in contact with an electrode to form a cathode terminal. A gate electrode is formed in contact with an intermediate N-type layer adjacent the anode to provide a gate terminal.

Abstract: The specification discloses a technique for passivating a semiconductor device which includes exposing a P-N junction in a multilayered semiconductor body. A mixture of glass and gold is prepared and applied to the exposed P-N junction. A mixture is fired to fuse the glass and gold on the semiconductor body. The carrier lifetime degrading characteristics of the gold reduces the current leakage at the exposed P-N junction. The technique substantially improves the voltage capacity and stability of semiconductor switching devices.

Abstract: In a method and apparatus for applying light sensitive materials to semiconductor slices, a plurality of semiconductor slices are supported in a spaced apart array extending along an axis. The slices are supported on knife edges positioned at circumferentially spaced points about the axis and each extending angularly both with respect to the axis and with respect to the radii of the slices so that the slices are supported by means of point contact with their edge portions. In one embodiment the knife edge comprise combs mounted in a cylindrical support fixture formed from an open material and including hingedly interconnected half cylinders. In another embodiment the knife edges are supported in a cup-shaped support fixture formed from an open material and adapted to receive semiconductor slices of varying sizes and particularly broken semiconductor slices.Light sensitive material is simultaneously applied to all of the semiconductor slices in the support fixture.

Abstract: A semiconductor switching device is disclosed which has symmetrical operating characteristics in four quadrants, and which is characterized by the substantial elimination of lateral switching currents. In the preferred embodiments, symmetrical semiconductor switching devices are disclosed having five and seven interleaved layers of opposite semiconductor conductivity types. A lower surface of each device is dissected into two areas by a linear groove extending through the outer semiconductor layers to separate apart and electrically isolate one area from the other, while an upper surface is dissected by a groove separating and electrically isolating opposing regions of opposite conductivity types which are formed in the upper surface and which overlap the projected path of the bottom groove.

Abstract: The specification discloses a package for a plurality of semiconductor chips which enables both visual and physical inspection and testing of the chips prior to the opening of the package. The package includes first and second transparent plastic sheets each having an array of depressions formed therein. The sheets are adjacently disposed and the depressions are mated and nested with one another in order to form a plurality of discrete compartments for containing the semiconductor chips. The sheets are attached about the peripheries to form a package for transmitting the chips. Apertures are formed through each of the plastic sheets in the region of each of the compartments, the apertures being smaller than the chips to constrain the chips within the compartments while allowing access to the chips through the apertures to enable physical testing of electrical characteristics of the chips.