Patents by Inventor Jea-young Kwon

Jea-young Kwon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240241835
    Abstract: A storage device includes a nonvolatile memory and a controller configured to manage data, stored in the nonvolatile memory, through a plurality of namespaces. The plurality of namespaces may include a first namespace, allocated to a first logical address space, and a second namespace allocated to a second logical address space, contiguous to the first logical address space. The controller may be configured to delete the first namespace in the first logical address space in response to a request of deleting the first name space, to copy the mapping information on the second namespace from the second logical address space to the first logical address space, and to load the mapping information on the second namespace into a cache.
    Type: Application
    Filed: December 6, 2023
    Publication date: July 18, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sungjin KIM, Jea-Young KWON, Jaesub KIM, Hongmoon WANG
  • Publication number: 20240220158
    Abstract: A storage device includes a nonvolatile memory device including a plurality of zones, each of the plurality of zones including a plurality of logical addresses, and a storage controller configured to control the nonvolatile memory, the storage controller including at least one buffer directly accessible by a host device, the buffer including at least one random write area and a write pointer, the write pointer configured to store a position indicating a starting logical address of the random write area, and the buffer configured to write data into the random write area based on the position of the write pointer in response to the buffer receiving the write data from the host device.
    Type: Application
    Filed: September 1, 2023
    Publication date: July 4, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Junho KIM, Jea-Young KWON, Jaesub KIM, Yangwoo ROH, Hongmoon WANG
  • Patent number: 11726871
    Abstract: A storage system may include a memory device including a first region including a single-level cell and a second region different from the first region, and a storage controller configured to read data from the first region at a first gear level of a plurality of gear levels, determine an error level of the read data and a state of the memory device, and change the first gear level to a second gear level of the plurality of gear levels based on the determined error level of the data and the determined state of the memory device.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: August 15, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-Kun Lee, Jea-Young Kwon, Hwan Kim, Song Ho Yoon, Sil Wan Chang
  • Patent number: 11656963
    Abstract: A storage device includes an integrity checking module checking integrity of data stored in a first host memory buffer (HMB) address of an HMB in a host coupled to the storage device, and an HMB mapping module mapping, if the integrity checking module determines the data as corrupted, the first HMB address to a second address.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: May 23, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yeon Woo Kim, Jea Young Kwon, Walter Jun
  • Patent number: 11625297
    Abstract: A storage device is provided. The storage device includes a memory device including a memory cell array configured to store metadata and main data and a storage controller configured to access the memory device and control the memory device, wherein the storage controller is configured to read data from the memory device at a speed adaptively varying to a first read speed or a second read speed according to a state of the memory device, the second read speed being faster than the first read speed.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: April 11, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jea-Young Kwon, Young-Jin Park, Jae-Kun Lee, Song Ho Yoon, Sil Wan Chang
  • Patent number: 11567685
    Abstract: A storage device may include, at least one memory device including at least a first single-level cell (SLC) region, a second SLC region, and at least one multi-level cell (MLC) region, the first SLC region having a higher data read speed than the second SLC region, and the second SLC region having a higher data read speed than the at least one MLC region, and a storage controller configured to control the migration of data among the first SLC region, the second SLC region, and the at least one MLC region.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: January 31, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hwan Kim, Jea-Young Kwon, Jae-Kun Lee, Song Ho Yoon, Sil Wan Chang
  • Publication number: 20220269572
    Abstract: A storage device includes an integrity checking module checking integrity of data stored in a first host memory buffer (HMB) address of an HMB in a host coupled to the storage device, and an HMB mapping module mapping, if the integrity checking module determines the data as corrupted, the first HMB address to a second address
    Type: Application
    Filed: February 24, 2022
    Publication date: August 25, 2022
    Inventors: Yeon Woo KIM, Jea Young KWON, Walter JUN
  • Publication number: 20220206893
    Abstract: A storage system may include a memory device including a first region including a single-level cell and a second region different from the first region, and a storage controller configured to read data from the first region at a first gear level of a plurality of gear levels, determine an error level of the read data and a state of the memory device, and change the first gear level to a second gear level of the plurality of gear levels based on the determined error level of the data and the determined state of the memory device.
    Type: Application
    Filed: September 3, 2021
    Publication date: June 30, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae-Kun LEE, Jea-Young KWON, Hwan KIM, Song Ho YOON, Sil Wan CHANG
  • Publication number: 20220164123
    Abstract: A storage device may include, at least one memory device including at least a first single-level cell (SLC) region, a second SLC region, and at least one multi-level cell (MLC) region, the first SLC region having a higher data read speed than the second SLC region, and the second SLC region having a higher data read speed than the at least one MLC region, and a storage controller configured to control the migration of data among the first SLC region, the second SLC region, and the at least one MLC region.
    Type: Application
    Filed: July 16, 2021
    Publication date: May 26, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hwan KIM, Jea-Young KWON, Jae-Kun LEE, Song Ho YOON, Sil Wan CHANG
  • Patent number: 11281549
    Abstract: A storage device includes an integrity checking module checking integrity of data stored in a first host memory buffer (HMB) address of an HMB in a host coupled to the storage device, and an HMB mapping module mapping, if the integrity checking module determines the data as corrupted, the first HMB address to a second address.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: March 22, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yeon Woo Kim, Jea Young Kwon, Walter Jun
  • Publication number: 20220066872
    Abstract: A storage device is provided. The storage device includes a memory device including a memory cell array configured to store metadata and main data and a storage controller configured to access the memory device and control the memory device, wherein the storage controller is configured to read data from the memory device at a speed adaptively varying to a first read speed or a second read speed according to a state of the memory device, the second read speed being faster than the first read speed.
    Type: Application
    Filed: June 21, 2021
    Publication date: March 3, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jea-Young KWON, Young-Jin PARK, Jae-Kun LEE, Song Ho YOON, Sil Wan CHANG
  • Publication number: 20200110677
    Abstract: A storage device includes an integrity checking module checking integrity of data stored in a first host memory buffer (HMB) address of an HMB in a host coupled to the storage device, and an HMB mapping module mapping, if the integrity checking module determines the data as corrupted, the first HMB address to a second address
    Type: Application
    Filed: July 10, 2019
    Publication date: April 9, 2020
    Inventors: Yeon Woo KIM, Jea Young KWON, Walter JUN
  • Publication number: 20130305008
    Abstract: A method of controlling operation timing of memory devices included in a storage apparatus and a memory system including the method. The method includes adjusting operation timing such that a number of memory devices that simultaneously perform operations is below a reference value according to a host request, and issuing operations according to the adjusted operation timing and transferring the issued operations to the memory devices.
    Type: Application
    Filed: March 15, 2013
    Publication date: November 14, 2013
    Applicant: Samsung Electronics Co., Ltd
    Inventors: Jea-young Kwon, Shine Kim, Seong-jun Ahn, Woo-seok Chang, Da-woon Jung