Patents by Inventor Jed D. Whittaker

Jed D. Whittaker has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11957065
    Abstract: Various techniques and apparatus permit fabrication of superconductive circuits. A superconducting integrated circuit comprising a superconducting stud via, a kinetic inductor, and a capacitor may be formed. Forming a superconducting stud via in a superconducting integrated circuit may include masking with a hard mask and masking with a soft mask. Forming a superconducting stud via in a superconducting integrated circuit may include depositing a dielectric etch stop layer. Interlayer misalignment in the fabrication of a superconducting integrated circuit may be measured by an electrical vernier. Interlayer misalignment in the fabrication of a superconducting integrated circuit may be measured by a chain of electrical verniers and a Wheatstone bridge. A superconducting integrated circuit with three or more metal layers may include an enclosed, matched, on-chip transmission line. A metal wiring layer in a superconducting integrated circuit may be encapsulated.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: April 9, 2024
    Assignee: 1372934 B.C. LTD.
    Inventors: Shuiyuan Huang, Byong H. Oh, Douglas P. Stadtler, Edward G. Sterpka, Paul I. Bunyk, Jed D. Whittaker, Fabio Altomare, Richard G. Harris, Colin C. Enderud, Loren J. Swenson, Nicolas C. Ladizinsky, Jason J. Yao, Eric G. Ladizinsky
  • Patent number: 11879950
    Abstract: Superconducting integrated circuits may advantageously employ superconducting resonators coupled to a microwave transmission line to efficiently address superconducting flux storage devices. In an XY-addressing scheme, a global flux bias may be applied to a number of superconducting flux storage devices via a low-frequency address line, and individual superconducting flux storage devices addressed via application of high-frequency pulses via resonators driven by the microwave transmission line. Frequency multiplexing can be employed to provide signals to two or more resonators. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to provide Z-addressing. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to eliminate a flux bias line.
    Type: Grant
    Filed: May 16, 2019
    Date of Patent: January 23, 2024
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: Loren J. Swenson, Emile M. Hoskinson, Mark H. Volkmann, Andrew J. Berkley, George E. G. Sterling, Jed D. Whittaker
  • Patent number: 11874344
    Abstract: A device is dynamically isolated via a broadband switch that includes a plurality of cascade elements in series, wherein each cascade element comprises a first set of SQUIDs in series, a matching capacitor, and a second set of SQUIDs in series. The broadband switch is set to a passing state via flux bias lines during programming and readout of the device and set to a suppression state during device's calculation to reduce operation errors at the device. A device is electrically isolated from high-frequencies via an unbiased broadband switch. A device is coupled to a tunable thermal bath that includes a broadband switch.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: January 16, 2024
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: Loren J. Swenson, Andrew J. Berkley, Mark H. Volkmann, George E. G. Sterling, Jed D. Whittaker
  • Patent number: 11847534
    Abstract: A superconducting readout system employing a microwave transmission line, and a microwave superconducting resonator communicatively coupled to the microwave transmission line, and including a superconducting quantum interference device (SQUID), may be advantageously calibrated at least in part by measuring a resonant frequency of the microwave superconducting resonator in response to a flux bias applied to the SQUID, measuring a sensitivity of the resonant frequency in response to the flux bias, and selecting an operating frequency and a sensitivity of the microwave superconducting resonator based at least in part on a variation of the resonant frequency as a function of the flux bias. The flux bias may be applied to the SQUID by an interface inductively coupled to the SQUID. Calibration of the superconducting readout system may also include determining at least one of a propagation delay, a microwave transmission line delay, and a microwave transmission line phase offset.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: December 19, 2023
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: Jed D. Whittaker, Loren J. Swenson, Ilya V. Perminov, Abraham J. Evert, Peter D. Spear, Mark H. Volkmann, Catia Baron Aznar, Michael S. Babcock
  • Publication number: 20230400510
    Abstract: Systems and methods for measuring noise in discrete regions of multi-layer superconducting fabrication stacks are described. Methods for measuring noise in spatial regions of a superconducting fabrication stacks may include the use of resonators, each having a different geometry. As many resonators as spatial regions are fabricated. Data collected from the resonators may be used to calculate fill fractions and spin densities for different spatial regions of the superconducting fabrication stack. The data may be collected via on-chip electron-spin resonance. The superconducting fabrications may be part of a fabrication stack for a superconducting processor, for example a quantum processor, and the spatial region studied may be proximate to qubit wiring layers.
    Type: Application
    Filed: October 21, 2022
    Publication date: December 14, 2023
    Inventors: Jed D. Whittaker, Richard Harris, Rahul Deshpande
  • Publication number: 20230204691
    Abstract: A device is dynamically isolated via a broadband switch that includes a plurality of cascade elements in series, wherein each cascade element comprises a first set of SQUIDs in series, a matching capacitor, and a second set of SQUIDs in series. The broadband switch is set to a passing state via flux bias lines during programming and readout of the device and set to a suppression state during device's calculation to reduce operation errors at the device. A device is electrically isolated from high-frequencies via an unbiased broadband switch. A device is coupled to a tunable thermal bath that includes a broadband switch.
    Type: Application
    Filed: December 15, 2022
    Publication date: June 29, 2023
    Inventors: Loren J. Swenson, Andrew J. Berkley, Mark H. Volkmann, George E.G. Sterling, Jed D. Whittaker
  • Publication number: 20230101616
    Abstract: Methods for mitigating microwave crosstalk and forming a component in a superconducting integrated circuit are discussed. Mitigating microwave crosstalk involves forming a microwave shield within the superconducting integrated circuit, the superconducting integrated circuit including a microwave sensitive component. The microwave shield is formed from a base layer and one or more sides, and the footprint of the microwave sensitive component is contained within the footprint of the microwave shielding base layer, with the one or more sides extending around at least a portion of the microwave sensitive component. Forming a component involves depositing a first metal layer, depositing a dielectric layer overlying the first metal layer, the dielectric layer comprising Nb2O5 that is deposited by atomic layer deposition, and depositing a second metal layer overlying the dielectric layer.
    Type: Application
    Filed: December 18, 2020
    Publication date: March 30, 2023
    Inventors: Mark H. Volkmann, Reza Molavi, Jed D. Whittaker
  • Patent number: 11561269
    Abstract: A device is dynamically isolated via a broadband switch that includes a plurality of cascade elements in series, wherein each cascade element comprises a first set of SQUIDs in series, a matching capacitor, and a second set of SQUIDs in series. The broadband switch is set to a passing state via flux bias lines during programming and readout of the device and set to a suppression state during device's calculation to reduce operation errors at the device. A device is electrically isolated from high-frequencies via an unbiased broadband switch. A device is coupled to a tunable thermal bath that includes a broadband switch.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: January 24, 2023
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: Loren J. Swenson, Andrew J. Berkley, Mark H. Volkmann, George E. G. Sterling, Jed D. Whittaker
  • Publication number: 20230006324
    Abstract: A superconducting circuit may include a transmission line having at least one transmission line inductance, a superconducting resonator, and a coupling capacitance that communicatively couples the superconducting resonator to the transmission line. The transmission line inductance may have a value selected to at least partially compensate for a variation in a characteristic impedance of the transmission line, the variation caused at least in part by the coupling capacitance. The coupling capacitance may be distributed along the length of the transmission line. A superconducting circuit may include a transmission line having at least one transmission line capacitance, a superconducting resonator, and a coupling inductance that communicatively couples the superconducting resonator to the transmission line. The transmission line capacitance may be selected to at least partially compensate for a variation in coupling strength between the superconducting resonator and the transmission line.
    Type: Application
    Filed: July 12, 2022
    Publication date: January 5, 2023
    Inventors: Jed D. Whittaker, Loren J. Swenson, Mark H. Volkmann
  • Patent number: 11424521
    Abstract: A superconducting circuit may include a transmission line having at least one transmission line inductance, a superconducting resonator, and a coupling capacitance that communicatively couples the superconducting resonator to the transmission line. The transmission line inductance may have a value selected to at least partially compensate for a variation in a characteristic impedance of the transmission line, the variation caused at least in part by the coupling capacitance. The coupling capacitance may be distributed along the length of the transmission line. A superconducting circuit may include a transmission line having at least one transmission line capacitance, a superconducting resonator, and a coupling inductance that communicatively couples the superconducting resonator to the transmission line. The transmission line capacitance may be selected to at least partially compensate for a variation in coupling strength between the superconducting resonator and the transmission line.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: August 23, 2022
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: Jed D. Whittaker, Loren J. Swenson, Mark H. Volkmann
  • Publication number: 20220011384
    Abstract: A device is dynamically isolated via a broadband switch that includes a plurality of cascade elements in series, wherein each cascade element comprises a first set of SQUIDs in series, a matching capacitor, and a second set of SQUIDs in series. The broadband switch is set to a passing state via flux bias lines during programming and readout of the device and set to a suppression state during device's calculation to reduce operation errors at the device. A device is electrically isolated from high-frequencies via an unbiased broadband switch. A device is coupled to a tunable thermal bath that includes a broadband switch.
    Type: Application
    Filed: July 29, 2021
    Publication date: January 13, 2022
    Inventors: Loren J. Swenson, Andrew J. Berkley, Mark H. Volkmann, George E.G. Sterling, Jed D. Whittaker
  • Publication number: 20210384406
    Abstract: Various techniques and apparatus permit fabrication of superconductive circuits. A superconducting integrated circuit comprising a superconducting stud via, a kinetic inductor, and a capacitor may be formed. Forming a superconducting stud via in a superconducting integrated circuit may include masking with a hard mask and masking with a soft mask. Forming a superconducting stud via in a superconducting integrated circuit may include depositing a dielectric etch stop layer. Interlayer misalignment in the fabrication of a superconducting integrated circuit may be measured by an electrical vernier. Interlayer misalignment in the fabrication of a superconducting integrated circuit may be measured by a chain of electrical verniers and a Wheatstone bridge. A superconducting integrated circuit with three or more metal layers may include an enclosed, matched, on-chip transmission line. A metal wiring layer in a superconducting integrated circuit may be encapsulated.
    Type: Application
    Filed: May 17, 2021
    Publication date: December 9, 2021
    Inventors: Shuiyuan Huang, Byong H. Oh, Douglas P. Stadtler, Edward G. Sterpka, Paul I. Bunyk, Jed D. Whittaker, Fabio Altomare, Richard G. Harris, Colin C. Enderud, Loren J. Swenson, Nicolas C. Ladizinsky, Jason J. Yao, Eric G. Ladizinsky
  • Publication number: 20210350268
    Abstract: A superconducting readout system employing a microwave transmission line, and a microwave superconducting resonator communicatively coupled to the microwave transmission line, and including a superconducting quantum interference device (SQUID), may be advantageously calibrated at least in part by measuring a resonant frequency of the microwave superconducting resonator in response to a flux bias applied to the SQUID, measuring a sensitivity of the resonant frequency in response to the flux bias, and selecting an operating frequency and a sensitivity of the microwave superconducting resonator based at least in part on a variation of the resonant frequency as a function of the flux bias. The flux bias may be applied to the SQUID by an interface inductively coupled to the SQUID. Calibration of the superconducting readout system may also include determining at least one of a propagation delay, a microwave transmission line delay, and a microwave transmission line phase offset.
    Type: Application
    Filed: August 22, 2019
    Publication date: November 11, 2021
    Inventors: Jed D. Whittaker, Loren J. Swenson, Ilya V. Perminov, Abraham J. Evert, Peter D. Spear, Mark H. Volkmann, Catia Baron Aznar, Michael S. Babcock
  • Publication number: 20210218367
    Abstract: A superconducting input and/or output system employs at least one microwave superconducting resonator. The microwave superconducting resonator(s) may be communicatively coupled to a microwave transmission line. Each microwave superconducting resonator may include a first and a second DC SQUID, in series with one another and with an inductance (e.g., inductor), and a capacitance in parallel with the first and second DC SQUIDs and inductance. Respective inductive interfaces are operable to apply flux bias to control the DC SQUIDs. The second DC SQUID may be coupled to a Quantum Flux Parametron (QFP), for example as a final element in a shift register. A superconducting parallel plate capacitor structure and method of fabricating such are also taught.
    Type: Application
    Filed: January 26, 2021
    Publication date: July 15, 2021
    Inventors: Andrew J. Berkley, Loren J. Swenson, Mark H. Volkmann, Jed D. Whittaker, Paul I. Bunyk, Peter D. Spear, Christopher B. Rich
  • Publication number: 20210190885
    Abstract: Superconducting integrated circuits may advantageously employ superconducting resonators coupled to a microwave transmission line to efficiently address superconducting flux storage devices. In an XY-addressing scheme, a global flux bias may be applied to a number of superconducting flux storage devices via a low-frequency address line, and individual superconducting flux storage devices addressed via application of high-frequency pulses via resonators driven by the microwave transmission line. Frequency multiplexing can be employed to provide signals to two or more resonators. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to provide Z-addressing. A low-frequency current bias may be combined with a high-frequency current in one or more superconducting resonators to eliminate a flux bias line.
    Type: Application
    Filed: May 16, 2019
    Publication date: June 24, 2021
    Inventors: Loren J. Swenson, Emile M. Hoskinson, Mark H. Volkmann, Andrew J. Berkley, George E.G. Sterling, Jed D. Whittaker
  • Patent number: 11038095
    Abstract: Various techniques and apparatus permit fabrication of superconductive circuits. A superconducting integrated circuit comprising a superconducting stud via, a kinetic inductor, and a capacitor may be formed. Forming a superconducting stud via in a superconducting integrated circuit may include masking with a hard mask and masking with a soft mask. Forming a superconducting stud via in a superconducting integrated circuit may include depositing a dielectric etch stop layer. Interlayer misalignment in the fabrication of a superconducting integrated circuit may be measured by an electrical vernier. Interlayer misalignment in the fabrication of a superconducting integrated circuit may be measured by a chain of electrical verniers and a Wheatstone bridge. A superconducting integrated circuit with three or more metal layers may include an enclosed, matched, on-chip transmission line. A metal wiring layer in a superconducting integrated circuit may be encapsulated.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: June 15, 2021
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: Shuiyuan Huang, Byong H. Oh, Douglas P. Stadtler, Edward G. Sterpka, Paul I. Bunyk, Jed D. Whittaker, Fabio Altomare, Richard G. Harris, Colin C. Enderud, Loren J. Swenson, Nicolas C. Ladizinsky, Jason J. Yao, Eric G. Ladizinsky
  • Patent number: 10938346
    Abstract: A superconducting input and/or output system employs at least one microwave superconducting resonator. The microwave superconducting resonator(s) may be communicatively coupled to a microwave transmission line. Each microwave superconducting resonator may include a first and a second DC SQUID, in series with one another and with an inductance (e.g., inductor), and a capacitance in parallel with the first and second DC SQUIDs and inductance. Respective inductive interfaces are operable to apply flux bias to control the DC SQUIDs. The second DC SQUID may be coupled to a Quantum Flux Parametron (QFP), for example as a final element in a shift register. A superconducting parallel plate capacitor structure and method of fabricating such are also taught.
    Type: Grant
    Filed: May 11, 2016
    Date of Patent: March 2, 2021
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: Andrew J. Berkley, Loren J. Swenson, Mark H. Volkmann, Jed D. Whittaker, Paul I. Bunyk, Peter D. Spear, Christopher B. Rich
  • Publication number: 20200411937
    Abstract: A superconducting circuit may include a transmission line having at least one transmission line inductance, a superconducting resonator, and a coupling capacitance that communicatively couples the superconducting resonator to the transmission line. The transmission line inductance may have a value selected to at least partially compensate for a variation in a characteristic impedance of the transmission line, the variation caused at least in part by the coupling capacitance. The coupling capacitance may be distributed along the length of the transmission line. A superconducting circuit may include a transmission line having at least one transmission line capacitance, a superconducting resonator, and a coupling inductance that communicatively couples the superconducting resonator to the transmission line. The transmission line capacitance may be selected to at least partially compensate for a variation in coupling strength between the superconducting resonator and the transmission line.
    Type: Application
    Filed: February 20, 2019
    Publication date: December 31, 2020
    Inventors: Jed D. Whittaker, Loren J. Swenson, Mark H. Volkmann
  • Publication number: 20200266234
    Abstract: Apparatus and methods advantageously provide parallel-plate capacitors in superconducting integrated circuits. A method may include forming a metal-oxide layer to overlie at least a portion of a first capacitor plate, the first capacitor plate comprising a superconductive material, and depositing a second capacitor plate to overlie at least a portion of the metal-oxide layer, the second capacitor plate comprising a superconductive material. The method may include depositing a base electrode of superconductive material to overlie at least a portion of a substrate, depositing the first capacitor plate to overlie at least a portion of the base electrode, and superconductingly electrically coupled to the base electrode, and depositing a counter electrode of superconductive material to overlie at least a portion of the second capacitor plate, the counter electrode superconductingly electrically coupled to the second capacitor plate.
    Type: Application
    Filed: April 19, 2019
    Publication date: August 20, 2020
    Inventors: Kelly T.R. Boothby, Loren J. Swenson, Mark H. Volkmann, Jed D. Whittaker
  • Publication number: 20200144476
    Abstract: Various techniques and apparatus permit fabrication of superconductive circuits. A superconducting integrated circuit comprising a superconducting stud via, a kinetic inductor, and a capacitor may be formed. Forming a superconducting stud via in a superconducting integrated circuit may include masking with a hard mask and masking with a soft mask. Forming a superconducting stud via in a superconducting integrated circuit may include depositing a dielectric etch stop layer. Interlayer misalignment in the fabrication of a superconducting integrated circuit may be measured by an electrical vernier. Interlayer misalignment in the fabrication of a superconducting integrated circuit may be measured by a chain of electrical verniers and a Wheatstone bridge. A superconducting integrated circuit with three or more metal layers may include an enclosed, matched, on-chip transmission line. A metal wiring layer in a superconducting integrated circuit may be encapsulated.
    Type: Application
    Filed: January 31, 2018
    Publication date: May 7, 2020
    Inventors: Shuiyuan Huang, Byong H. Oh, Douglas P. Stadtler, Edward G. Sterpka, Paul I. Bunyk, Jed D. Whittaker, Fabio Altomare, Richard G. Harris, Colin C. Enderud, Loren J. Swenson, Nicolas C. Ladizinsky, Jason J. Yao, Eric G. Ladizinsky