Abstract: Systems, devices and methods for high-speed I/O margin testing can screen high volumes of pre-production and production parts and identify cases where the electrical characteristics have changed enough to impact operation. The margin tester disclosed is lower cost, easier to use and faster than traditional BERT and scopes and can operate on the full multi-lane I/O links in their standard operating states with full loading and cross-talk. The margin tester assesses the electrical receiver margin of an operation multi-lane high speed I/O link of a device under test simultaneously in either or both directions. In a technology-specific form, an embodiment of the margin tester can be implemented as an add-in card margin tester to test motherboard slots of a mother board under test, or as a as a motherboard with slots to test add-in cards.

Abstract: A test and measurement instrument includes an auxiliary trigger input port for receiving an auxiliary trigger signal, a digital trigger processor for generating a digital trigger signal from the auxiliary trigger signal, an analog trigger processor for generating an analog trigger signal from the auxiliary trigger signal, a user-configurable selector coupled to the digital trigger processor and to the analog trigger processor, the user-configurable selector configured to output either the digital trigger signal or the analog trigger signal as a selected trigger output signal of the instrument. Methods of creating parallel triggers are also described.

Abstract: An apparatus and method that captures a complete history of serial network Link Training negotiations by continuously monitoring multiple analog signals representing both sides of full duplex lanes in real-time by pattern matching the Link Training Frame Marker and the subsequent negotiation request/response data values. The apparatus and method compare the digitized version of the incoming signal against a nominal pattern at the start to find the Frame Markers and Control Channel data, storing only those Control Channel data values that do not match the current compare pattern, and further by updating the current compare pattern to the new pattern just received, so that only the transitions in the data values are stored, thereby vastly reducing the amount of data presented to the user, but nonetheless retaining the complete substantive history of the Link Training negotiations.

Abstract: Systems, devices and methods for high-speed I/O margin testing can screen high volumes of pre-production and production parts and identify cases where the electrical characteristics have changed enough to impact operation. The margin tester disclosed is lower cost, easier to use and faster than traditional BERT and scopes and can operate on the full multi-lane I/O links in their standard operating states with full loading and cross-talk. The margin tester assesses the electrical receiver margin of an operation multi-lane high speed I/O link of a device under test simultaneously in either or both directions. In a technology-specific form, an embodiment of the margin tester can be implemented as an add-in card margin tester to test motherboard slots of a mother board under test, or as a as a motherboard with slots to test add-in cards.

Abstract: Systems, devices and methods for high-speed I/O margin testing can screen high volumes of pre-production and production parts and identify cases where the electrical characteristics have changed enough to impact operation. The margin tester disclosed is lower cost, easier to use and faster than traditional BERT and scopes and can operate on the full multi-lane I/O links in their standard operating states with full loading and cross-talk. The margin tester assesses the electrical receiver margin of an operation multi-lane high speed I/O link of a device under test simultaneously in either or both directions. In a technology-specific form, an embodiment of the margin tester can be implemented as an add-in card margin tester to test motherboard slots of a mother board under test, or as a as a motherboard with slots to test add-in cards.

Abstract: A test and measurement instrument, such as an oscilloscope, including one or more ports to receive one or more signals from a device under test, a trigger enable logic circuit configured to output a trigger enabled signal when a trigger enable event occurs within the one or more signals, the trigger enable event being a real-time event of the one or more signals, one or more trigger logic circuits configured to generate a plurality of trigger signals when the trigger enable signal is received, each trigger signal being generated when a trigger event occurs within one of the one or more signals, and an acquisition circuit configured to acquire and store data in a memory in response to each of the trigger signals.

Abstract: A test and measurement instrument, such as an oscilloscope, including one or more ports to receive one or more signals from a device under test, a trigger enable logic circuit configured to output a trigger enabled signal when a trigger enable event occurs within the one or more signals, the trigger enable event being a real-time event of the one or more signals, one or more trigger logic circuits configured to generate a plurality of trigger signals when the trigger enable signal is received, each trigger signal being generated when a trigger event occurs within one of the one or more signals, and an acquisition circuit configured to acquire and store data in a memory in response to each of the trigger signals.

Abstract: A test and measurement instrument, including an input configured to receive a signal-under-test, a user input configured to accept a first trigger event and a second trigger event from a user, a first trigger decoder configured to trigger on an occurrence of the first trigger event and generate a first trigger signal, a second trigger decoder configured to trigger on an occurrence of the second trigger event occurring after the first trigger event and generate a second trigger signal, and an acquisition system configured to acquire the signal-under-test in response to the first trigger signal and store the acquired signal-under-test based on whether the second trigger signal validates or invalidates the first trigger signal.

Abstract: An apparatus and method that captures a complete history of serial network Link Training negotiations by continuously monitoring multiple analog signals representing both sides of full duplex lanes in real-time by pattern matching the Link Training Frame Marker and the subsequent negotiation request/response data values. The apparatus and method compare the digitized version of the incoming signal against a nominal pattern at the start to find the Frame Markers and Control Channel data, storing only those Control Channel data values that do not match the current compare pattern, and further by updating the current compare pattern to the new pattern just received, so that only the transitions in the data values are stored, thereby vastly reducing the amount of data presented to the user, but nonetheless retaining the complete substantive history of the Link Training negotiations.

Abstract: A test and measurement system for synchronizing multiple oscilloscopes including a host oscilloscope and at least one client oscilloscope. The host oscilloscope includes a host timebase clock configured to output a clock signal, a host digitizer including a digitizer synchronization clock based on the clock signal, and a host acquisition controller includes a trigger synchronization clock based the clock signal and outputs a run signal to begin an acquisition of an input signal. Each client oscilloscope includes a client timebase clock configured to receive the clock signal from the host timebase clock and output the clock signal, a client digitizer including a digitizer synchronization clock based on the clock signal, and a client acquisition controller includes a trigger synchronization clock based on the clock signal and receives the run signal from the host acquisition controller and begins an acquisition of another input signal based on the run signal.

Abstract: A test and measurement system for synchronizing multiple oscilloscopes including a host oscilloscope and at least one client oscilloscope. The host oscilloscope includes a host timebase clock configured to output a clock signal, a host digitizer including a digitizer synchronization clock based on the clock signal, and a host acquisition controller includes a trigger synchronization clock based the clock signal and outputs a run signal to begin an acquisition of an input signal. Each client oscilloscope includes a client timebase clock configured to receive the clock signal from the host timebase clock and output the clock signal, a client digitizer including a digitizer synchronization clock based on the clock signal, and a client acquisition controller includes a trigger synchronization clock based on the clock signal and receives the run signal from the host acquisition controller and begins an acquisition of another input signal based on the run signal.

Abstract: A test and measurement instrument, including an input configured to receive a signal-under-test, a user input configured to accept a first trigger event and a second trigger event from a user, a first trigger decoder configured to trigger on an occurrence of the first trigger event and generate a first trigger signal, a second trigger decoder configured to trigger on an occurrence of the second trigger event occurring after the first trigger event and generate a second trigger signal, and an acquisition system configured to acquire the signal-under-test in response to the first trigger signal and store the acquired signal-under-test based on whether the second trigger signal validates or invalidates the first trigger signal.