Patents by Inventor Jee Soo Mok

Jee Soo Mok has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080263860
    Abstract: A method for manufacturing a printed circuit board having an embedded component is disclosed. The method includes: forming at least one contact bump and at least one electrode bump on one side of a base substrate; mounting the component such that the electrode bump is in correspondence with a contact terminal of the component; stacking an insulation layer, in which an opening is formed in correspondence to the component, on the one side of the base substrate, such that the contact bump penetrates the insulation layer; filling a filler in the opening; and stacking a metal layer on the insulation layer. Using the method, the reliability of circuit connections between the component and the circuit patterns can be improved, and the manufacturing process can be reduced in embedding the component in the printed circuit board.
    Type: Application
    Filed: January 8, 2008
    Publication date: October 30, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jee-Soo Mok, Jun-Heyoung Park, Ki-Hwan Kim, Sung-Yong Kim
  • Patent number: 7435352
    Abstract: A method for forming a solder resist pattern includes laminating a semi-cured thermosetting film on both sides of a substrate and laser ablating the laminated thermosetting film according to a solder resist mask pattern. The method is applicable to multilayer printed circuit boards, which are fabricated either by the buildup process or the parallel process. Lower manufacturing costs and improved accuracy of the solder resist pattern can be achieved due to the simplified process.
    Type: Grant
    Filed: October 2, 2003
    Date of Patent: October 14, 2008
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jee-Soo Mok, Jang-Kyu Kang, Chang-Hyun Nam
  • Publication number: 20080115961
    Abstract: A printed circuit board and a manufacturing method thereof are disclosed. Using a method of manufacturing a printed circuit board which includes forming a circuit pattern, which includes lands, on a first board; forming a paste bump on the land of the first board; and stacking an insulation on a surface of the first board such that the paste bump penetrates the insulation, where the paste bump is formed to cover the land of the first board, the areas of the lands can be reduced to manufacture a printed circuit board of high density, and the contact reliability can be increased due to the increase in contact area between the lands and paste bumps to improve the performance of the high-density printed circuit-board.
    Type: Application
    Filed: November 13, 2007
    Publication date: May 22, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jee-Soo Mok, Dong-Jin Park, Jun-Heyoung Park, Ki-Hwan Kim, Sung-Young Kim
  • Publication number: 20070235220
    Abstract: The present invention provides a method for manufacturing a printed circuit board and a print circuit board manufactured thereby, in which through holes of a core board are filled by reverse pulse plating so that it allows to manufacture a core board having greater than 100 ?m of a thickness which has been a processing limitation with conventional technologies and form bumps on a thick insulation layer, which has been difficult till now, and thus providing resistance against pressure of paste bumps produced during stacking due to the increased strength of a core board, convenience to join between layers, excellent heat-releasing effect, and collectively stacking of core boards, which was not possible with conventional methods.
    Type: Application
    Filed: March 28, 2007
    Publication date: October 11, 2007
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hee-Bum Shin, Dong-Jin Park, Jee-Soo Mok, Jong-Suk Bae, Ki-Hwan Kim
  • Patent number: 7279412
    Abstract: Disclosed are a multi-layer printed circuit board and a method for manufacturing the multi-layer printed circuit board. Circuit layers and insulating layers are alternately stacked so that via holes of the circuit layers provided with plated inner walls without application of additional plating and conductive paste-filling steps are connected to via holes of the insulating layers filled with a conductive paste.
    Type: Grant
    Filed: November 20, 2003
    Date of Patent: October 9, 2007
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jee-Soo Mok, Byung-Kook Sun, Chang-Kyu Song, Geum-Hee Yun, Tae-Hoon Kim
  • Publication number: 20070187810
    Abstract: An aspect of the present invention features a manufacturing method of a package on package with a cavity. The method can comprise (a) forming a first upper substrate cavity in one side of an upper substrate; (b) mounting an upper semiconductor chip on the other side of the upper substrate; (c) forming a lower substrate cavity in one side of a lower substrate; (d) mounting a lower semiconductor chip in the lower substrate cavity formed in the lower substrate; and (e) stacking the upper substrate above the lower substrate such that the first upper substrate cavity accommodates a part of the lower semiconductor chip. The package on package and a manufacturing method thereof can reduce the overall thickness of the package by forming cavities in both upper and lower substrates to accommodate a semiconductor chip mounted in the lower substrate.
    Type: Application
    Filed: February 15, 2007
    Publication date: August 16, 2007
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jee-Soo Mok, Chang-Sup Ryu, Dong-Jin Park
  • Publication number: 20070120253
    Abstract: A core substrate and multilayer printed circuit board using paste bumps and manufacturing method thereof are disclosed. With the method of manufacturing a core substrate using paste bumps comprising: (a) aligning a pair of paste bump boards, each of which has a plurality of paste bumps joined to its surface, such that the paste bumps face each other, and (b) pressing the pair of paste bump boards together, where an insulation element is placed between the pair of paste bump boards, it is easier to implement interlayer electrical interconnection between circuit patterns, the thickness of the core substrate can readily be adjusted by adjusting the thickness of the insulation layer, the stiffness is improved as a pair of paste bump boards are pressed from the top and bottom, and high-density wiring can be formed more easily as the paste bumps are connected in pairs so that the diameters of the paste bumps formed on the paste bump boards can be reduced.
    Type: Application
    Filed: November 21, 2006
    Publication date: May 31, 2007
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yoong Oh, Chang-Sup Ryu, Dong-Jin Park, Jee-Soo Mok, Byung-Bae Seo
  • Publication number: 20070107934
    Abstract: A printed circuit board using paste bumps and manufacturing method thereof are disclosed.
    Type: Application
    Filed: November 13, 2006
    Publication date: May 17, 2007
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jee-Soo Mok, Chang-Sup Ryu, Eung-Suek Lee, Youn-Soo Seo, Hee-Bum Shin, Yoong Oh, Byung-Bae Seo, Tae-Kyoung Kim, Dong-Jin Park
  • Publication number: 20070059917
    Abstract: A manufacturing method for a printed circuit board having a fine pattern is disclosed, comprising: providing a carrier plate; coating the carrier plate with a photosensitive material; forming a first circuit pattern on the photosensitive material; forming a first circuit layer by drying a conductive paste printed into a space between the photosensitive materials where the first circuit pattern is formed; depositing an insulation layer on the first circuit layer; processing via holes penetrating the insulation layer; coating the insulation layer with the photosensitive material and then forming a second circuit pattern in the photosensitive material; forming a second circuit layer and filling the via holes by drying the conductive paste printed into a space between the photosensitive materials, where the second circuit pattern is formed, and the via holes; and removing the carrier plate.
    Type: Application
    Filed: September 14, 2006
    Publication date: March 15, 2007
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jee-Soo Mok, Chang-Sup Ryu, Eung-Suek Lee, Ki-Hwan Kim, Sung-Yong Kim
  • Patent number: 7169707
    Abstract: Disclosed herein is a method of manufacturing a package substrate with a fine circuit pattern using anodic oxidation. By anodizing a metal core which is opened through a masking process, oxidation layers are formed in open areas of the metal core to insulate portions of circuit pattern from each other. Further, by electroplating portions provided between the oxidation layers with copper or filling conductive paste between the oxidation layers using a screen, a package substrate having a fine circuit pattern is achieved.
    Type: Grant
    Filed: December 13, 2004
    Date of Patent: January 30, 2007
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Duck Young Maeng, Byung Kook Sun, Tae Hoon Kim, Jee Soo Mok, Jong Suk Bae, Yoong Oh, Chang-Kyu Song, Suk-Hyeon Cho
  • Publication number: 20060029726
    Abstract: Disclosed is a method of fabricating a multilayer PCB (MLB). More particularly, the present invention relates to a method of fabricating a multilayer PCB, in which plural circuit layers having insulating layers attached thereto and another circuit layer having no insulating layer are formed in a parallel manner according to separate processes, and laminated at one time, unlike fabrication of the multilayer PCB adopting a conventional build-up manner.
    Type: Application
    Filed: September 24, 2004
    Publication date: February 9, 2006
    Inventors: Jee-Soo Mok, Byung-Kook Sun, Chang-Kyu Song, Jun-Heyoung Park, Duck-Young Maeng, Tae-Hoon Kim
  • Publication number: 20050085065
    Abstract: Disclosed are a multi-layer printed circuit board and a method for manufacturing the multi-layer printed circuit board. Circuit layers and insulating layers are alternately stacked so that via holes of the circuit layers provided with plated inner walls without application of additional plating and conductive paste-filling steps are connected to via holes of the insulating layers filled with a conductive paste.
    Type: Application
    Filed: November 20, 2003
    Publication date: April 21, 2005
    Inventors: Jee-Soo Mok, Byung-Kook Sun, Chang-Kyu Song, Geum-Hee Yun, Tae-Hoon Kim
  • Publication number: 20040248410
    Abstract: Disclosed herein is a method for forming a solder resist pattern which can replace conventional solder resist printing processes. The method for forming a solder resist pattern comprises the steps of: laminating a semi-cured thermosetting film on both sides of a substrate; and laser ablating the laminated thermosetting film according to a solder resist mask pattern.
    Type: Application
    Filed: October 2, 2003
    Publication date: December 9, 2004
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jee-Soo Mok, Jang-Kyu Kang, Chang-Hyun Nam
  • Publication number: 20040194303
    Abstract: Disclosed is a method of fabricating a multi-layered PCB, wherein a plurality of circuit layers on which circuit patterns are constructed and insulating layers which are alternately positioned between the circuit layers to insulate the circuit layers from each other are severally fabricated according to different processes, and then layered with each other at once.
    Type: Application
    Filed: October 2, 2003
    Publication date: October 7, 2004
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Eung-Soo Kim, Jang-Kyu Kang, Jee-Soo Mok, John-Tae Lee, Chang-Kyu Song, Byung-Kook Sun