Patents by Inventor Jeehoon HWANG

Jeehoon HWANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180294225
    Abstract: Provided are a three-dimensional semiconductor memory device and a method of fabricating the same. The device may include a substrate a substrate including a peripheral circuit region and a cell array region, an electrode structure including a plurality of electrodes vertically stacked on the cell array region of the substrate, a peripheral logic circuit provided on the peripheral circuit region of the substrate, the peripheral logic circuit including a first impurity region doped with first impurities, a peripheral contact plug connected to the first impurity region, and a second impurity region between the first impurity region and the peripheral contact plug, the second impurity region being including second impurities different from the first impurities.
    Type: Application
    Filed: December 27, 2017
    Publication date: October 11, 2018
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: TaeHee Lee, Juyeon LEE, Jeehoon HWANG
  • Patent number: 9559116
    Abstract: A semiconductor device may include an insulating layer provided in one body on a substrate, a first gate electrode and a second gate electrode disposed on the insulating layer, the first and second gate electrodes extending in a first direction parallel to a top surface of the substrate, a first channel structure penetrating the first gate electrode and the insulating layer so as to be connected to the substrate, a second channel structure penetrating the second gate electrode and the insulating layer so as to be connected to the substrate, and a contact penetrating the insulating layer between the first gate electrode and the second gate electrode. The contact may be connected to a common source region formed in the substrate, and the common source region may have a first conductivity type.
    Type: Grant
    Filed: April 24, 2015
    Date of Patent: January 31, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hongsoo Kim, HunKook Lee, Jeehoon Hwang
  • Publication number: 20160049422
    Abstract: A semiconductor device may include an insulating layer provided in one body on a substrate, a first gate electrode and a second gate electrode disposed on the insulating layer, the first and second gate electrodes extending in a first direction parallel to a top surface of the substrate, a first channel structure penetrating the first gate electrode and the insulating layer so as to be connected to the substrate, a second channel structure penetrating the second gate electrode and the insulating layer so as to be connected to the substrate, and a contact penetrating the insulating layer between the first gate electrode and the second gate electrode. The contact may be connected to a common source region formed in the substrate, and the common source region may have a first conductivity type.
    Type: Application
    Filed: April 24, 2015
    Publication date: February 18, 2016
    Inventors: HONGSOO KIM, HunKook LEE, Jeehoon HWANG