Patents by Inventor Jee Hoon Kim

Jee Hoon Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11974433
    Abstract: A semiconductor memory device includes a third insulating pattern and a first insulating pattern on a substrate, the third insulating pattern and the first insulating pattern being spaced apart from each other in a first direction that is perpendicular to the substrate such that a bottom surface of the third insulating pattern and a top surface of the first insulating pattern face each other, a gate electrode between the bottom surface of the third insulating pattern and the top surface of the first insulating pattern, and including a first side extending between the bottom surface of the third insulating pattern and the top surface of the first insulating pattern, and a second insulating pattern that protrudes from the first side of the gate electrode by a second width in a second direction, the second direction being different from the first direction.
    Type: Grant
    Filed: January 14, 2022
    Date of Patent: April 30, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joo-Heon Kang, Tae Hun Kim, Jae Ryong Sim, Kwang Young Jung, Gi Yong Chung, Jee Hoon Han, Doo Hee Hwang
  • Publication number: 20240122006
    Abstract: A display device includes a data conductive layer including a first power line, a passivation layer with a first opening exposing the first power line, a via layer with a second opening partially overlapping the first opening, a pixel electrode on the via layer, a connection electrode in the first and second openings, a pixel-defining film with an opening overlapping the second opening, a light-emitting layer on the pixel-defining film, the pixel electrode and the connection electrode, and a common electrode connected to the first power line. The data conductive layer includes a data base layer, a data main metal layer, and a data capping layer, the first power line includes a wire connection structure, in which the data main metal layer is recessed from sides of the data capping layer, and the common electrode is connected to the data main metal layer in the wire connection structure.
    Type: Application
    Filed: August 28, 2023
    Publication date: April 11, 2024
    Inventors: Shin Hyuk YANG, Dong Han KANG, Jee Hoon KIM, Sung Gwon MOON, Seung Sok SON, Woo Geun LEE
  • Publication number: 20240120342
    Abstract: A transistor array substrate includes a substrate, an active layer disposed on the substrate and including a channel region, a source region and a drain region, a gate insulating layer disposed on a part of the active layer, a gate electrode overlapping the channel region of the active layer and included in an electrode conductive layer which is disposed on the gate insulating layer, a source electrode included in the electrode conductive layer and in contact with a part of the source region of the active layer, and a drain electrode included in the electrode conductive layer and in contact with a part of the drain region of the active layer. The active layer includes an oxide semiconductor including crystals and is disposed as an island shape excluding a hole in a plan view.
    Type: Application
    Filed: June 10, 2023
    Publication date: April 11, 2024
    Inventors: Sung Gwon MOON, Dong Han KANG, Jee Hoon KIM, Seung Sok SON, Shin Hyuk YANG, Woo Geun LEE
  • Patent number: 11956566
    Abstract: An audio-visual system may include a housing comprising an open upper end and a storage space, an audio-visual device installed inside the housing and exposable through the open upper end, and a lifting device configured to expose or store the audio-visual device inside the housing through the open upper end. The audio-visual device may include a display, a speaker, and a processor configured to control the audio-visual system to operate in a first mode for outputting media art content while the display is stored in the housing according to a first event, operate in a second mode for outputting audio content through the speaker while part of the display is exposed through the open upper end according to a second event, and operate in a third mode for outputting a visual content while the entire display is exposed through the open upper end according to a third event.
    Type: Grant
    Filed: January 20, 2023
    Date of Patent: April 9, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ha-Na Kim, Jee-hoon Park, Hyun-yong Choi, You-na Choo, Soo-hyun Whang
  • Patent number: 11940501
    Abstract: The present invention relates to a method and an apparatus for diagnosing low voltage of a secondary battery cell. The method for diagnosing low voltage of a secondary battery cell according to an embodiment of the present invention includes pre-aging a battery cell, charging the battery cell according to a preset charging condition, measuring a parameter for determining low voltage failure of the battery cell, comparing the measured parameter with a reference parameter, and performing formation when the battery cell is determined to be normal.
    Type: Grant
    Filed: October 4, 2019
    Date of Patent: March 26, 2024
    Assignee: LG ENERGY SOLUTION, LTD.
    Inventors: Yong Tae Lee, Myung Hoon Ko, Jee Ho Kim, Gyung Soo Kang
  • Patent number: 11923213
    Abstract: Proposed is a substrate heating unit including: a laser generator providing a laser beam for heating a substrate; and a beam shaper processing the laser beam from the laser generator and selectively providing one of a first beam having a uniform energy distribution and a second beam having an edge-enhanced energy distribution to the substrate.
    Type: Grant
    Filed: December 20, 2020
    Date of Patent: March 5, 2024
    Assignee: SEMES CO., LTD.
    Inventors: Tae Shin Kim, Young Dae Chung, Ji Hoon Jeong, Jee Young Lee, Won Geun Kim
  • Patent number: 11916258
    Abstract: A secondary battery comprises an electrode assembly, a can, and an insulator. The electrode assembly includes a first electrode, a separator, and a second electrode alternately stacked and wound. The can has an accommodation part accommodating the electrode assembly therein, and the can comprises a first can and a second can having cylindrical shapes open in a direction facing each other. The insulator insulates an overlapping portion between the first can and the second can. The first can is electrically connected to the first electrode, and the second can is electrically connected to the second electrode. The insulator has a short-circuit induction through-part defined by a through-hole or a cutoff line, such that a short circuit occurs between the first can and the second can through the short-circuit induction through-part when it is deformed in shape as heat or a pressure is applied to contract or expand the insulator.
    Type: Grant
    Filed: October 4, 2019
    Date of Patent: February 27, 2024
    Assignee: LG Energy Solution, Ltd.
    Inventors: Gyung Soo Kang, Jee Ho Kim, Yong Tae Lee, Myung Hoon Ko, Jung Il Park, Ki Youn Kim
  • Publication number: 20230387828
    Abstract: The present invention relates to a piezoelectric motor that can be moved with very fine resolution at the nanometer level by means of a piezoelectric element (piezo actuator) that increases in length when a voltage is applied.
    Type: Application
    Filed: June 11, 2021
    Publication date: November 30, 2023
    Inventors: Jee-hoon KIM, Jin-young YOUN
  • Publication number: 20230354664
    Abstract: A display device includes a substrate, an emission layer disposed on the substrate, and a plurality of signal lines disposed on the substrate, electrically connected to the emission layer, and including a first signal line. The first signal line includes a first layer including a refractory metal, a second layer disposed on the first layer and including a low-resistance metal, a third layer disposed on the second layer and including a first metal oxide, and a fourth layer disposed on the third layer and including a second metal oxide, and the first metal oxide of the third layer includes the low-resistance metal of the second layer.
    Type: Application
    Filed: March 7, 2023
    Publication date: November 2, 2023
    Applicant: Samsung Display Co., LTD.
    Inventors: Shin Hyuk YANG, Jee Hoon KIM, Dong Han KANG
  • Patent number: 11680321
    Abstract: A method for fabricating a semiconductor device, including the steps of: providing a substrate having an etch stop layer formed thereon; forming a preliminary stacked structure on the etch stop layer, the preliminary stacked structure including a lower sacrifice layer contacting the etch stop layer, a support layer, and an upper sacrifice layer; forming a hole penetrating the preliminary stacked structure and the etch stop layer; forming a conductive pattern in the hole; removing the upper sacrifice layer and a portion of the support layer; removing the lower sacrifice layer; forming a first conductive layer covering the conductive pattern; and forming a dielectric layer covering the first conductive layer, a remaining portion of the support layer, and the etch stop layer.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: June 20, 2023
    Assignee: XIA TAI XIN SEMICONDUCTOR (QING DAO) LTD.
    Inventors: Chan-Sul Joo, Jee-Hoon Kim
  • Patent number: 11665363
    Abstract: Disclosed herein are a method, apparatus, system, and computer-readable recording medium for image compression. An encoding apparatus performs preprocessing of feature map information, frame packing, frame classification, and encoding. A decoding apparatus performs decoding, frame depacking, and postprocessing in order to reconstruct feature map information. By encoding the feature map information, inter-prediction and intra-block prediction for a frame are performed. The encoding apparatus provides the decoding apparatus with a feature map information bitstream for reconstructing the feature map information along with an image information bitstream.
    Type: Grant
    Filed: November 26, 2021
    Date of Patent: May 30, 2023
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Hyoung-Jin Kwon, Ji-Hoon Do, Dong-Hyun Kim, Youn-Hee Kim, Jong-Ho Kim, Joo-Young Lee, Se-Yoon Jeong, Jin-Soo Choi, Tae-Jin Lee, Jee-Hoon Kim, Dong-Gyu Sim, Seoung-Jun Oh, Min-Hun Lee, Yun-Gu Lee, Han-Sol Choi, Kwang-Hwan Kim
  • Patent number: 11621312
    Abstract: A display device includes a first conductive pattern on a substrate, a first insulating layer on the first conductive pattern, a semiconductor pattern on the first insulating layer, a second insulating layer on the first insulating layer and the semiconductor pattern, and a second conductive pattern on the second insulating layer. A first edge of the first conductive pattern faces a second edge of the second conductive pattern, the first conductive pattern does not overlap the second conductive pattern in an area where the first edge faces the second edge, the semiconductor pattern is in the area where the first edge faces the second edge, the second conductive pattern overlaps the second insulating layer, and the second insulating layer includes a third edge protruding from the second edge of the second conductive pattern.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: April 4, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sang Hyung Lim, Jee Hoon Kim, Mi Hyang Sheen, Jin Ho Jang, Myeong Kyu Park, Na Ri Ahn, Hui Won Yang, Doo Hyoung Lee
  • Patent number: 11587975
    Abstract: A display device includes a substrate; a semiconductor layer disposed on the substrate; a gate insulating film disposed on the semiconductor layer; a gate layer disposed on the gate insulating film and insulated from the semiconductor layer; an insulating film disposed on the semiconductor layer and the gate layer; and a metal layer disposed on the insulating film, wherein the semiconductor layer and the gate layer are electrically connected through the metal layer, and the semiconductor layer overlaps the gate layer in a plan view.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: February 21, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jee Hoon Kim, Jae Seol Cho, Jong Moo Huh, Sung Jae Moon, Hui-Won Yang, Kang Moon Jo
  • Patent number: 11572624
    Abstract: An apparatus for processing a substrate is provided. The apparatus comprises a processing chamber and a showerhead. The showerhead is in the processing chamber and has a plurality of first holes with a first size in a first zone of the showerhead, a plurality of second holes with a second hole size in a second zone of the showerhead, and a plurality of third holes with a third hole size in a third zone of the showerhead. The first hole size is different from the second hole size. The first zone is surrounded by the second zone. An area of the first zone is larger than an area of the second zone. The first hole size is different from the third hole size. The first zone is surrounded by the third zone, and an area of the first zone is larger than an area of the third zone.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: February 7, 2023
    Assignee: XIA TAI XIN SEMICONDUCTOR (QING DAO) LTD.
    Inventors: Chan-Sul Joo, Jee-Hoon Kim
  • Patent number: 11527594
    Abstract: An organic light emitting display device includes a substrate, a buffer layer, an active layer, a gate insulation layer, a protective insulating layer, a gate electrode, an insulating interlayer, source and drain electrodes, and a sub-pixel structure. The buffer layer is disposed on the substrate. The active layer is disposed on the buffer layer, and has a source region, a drain region, and a channel region. The gate insulation layer is disposed in the channel region on the active layer. The protective insulating layer is disposed on the buffer layer, the source and drain regions of the active layer, and the gate insulation layer. The gate electrode is disposed in the channel region on the protective insulating layer. The insulating interlayer is disposed on the gate electrode. The source and drain electrodes are disposed on the insulating interlayer.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: December 13, 2022
    Inventors: Shin-Hyuk Yang, Kwang-Soo Lee, Doo-Hyun Kim, Jee-Hoon Kim
  • Publication number: 20220359791
    Abstract: A display device includes a substrate, a first and second bank patterns disposed on a substrate, a gate insulating layer overlapping the first bank pattern, a first transistor including a first and second electrodes disposed on the substrate with the first bank pattern interposed therebetween in a thickness direction, a first semiconductor pattern connected to the first electrode and the second electrode and disposed on a side surface of the first bank pattern, and a first gate electrode disposed to correspond to the first semiconductor pattern with the first semiconductor pattern and the gate insulating layer interposed therebetween, a light emitting element connected to the first transistor and having a first end part and a second end part, a first pixel electrode that contacts the first end part of the light emitting element, and a second pixel electrode that contacts the second end part of the light emitting element.
    Type: Application
    Filed: May 9, 2022
    Publication date: November 10, 2022
    Applicant: Samsung Display Co., LTD.
    Inventors: Jee Hoon KIM, Shin Hyuk YANG, Jae Seol CHO
  • Publication number: 20220320216
    Abstract: A display device comprises a repair circuit, and a repair circuit connection pattern extending across a pixel and the repair circuit. Each of a first and second subpixels comprises a light emitting element, a first transistor connected thereto, and a second transistor connected to a gate electrode of the first transistor. The repair circuit comprises first and second repair transistors connected to a gate electrode of the first repair transistor. A first source/drain electrode of the first transistor of each of the first and second subpixels is connected to the power line, a second source/drain electrode of the first transistor of each of the first and second subpixels overlaps the repair circuit connection pattern. A first source/drain electrode of the first repair transistor is connected to the power line, and a second source/drain electrode of the first repair transistor overlaps the first repair circuit connection pattern.
    Type: Application
    Filed: February 4, 2022
    Publication date: October 6, 2022
    Applicant: Samsung Display Co., LTD.
    Inventors: Jee Hoon KIM, Shin Hyuk YANG, Hui Won YANG
  • Publication number: 20220178030
    Abstract: A method for fabricating a semiconductor device, including the steps of: providing a substrate having an etch stop layer formed thereon; forming a preliminary stacked structure on the etch stop layer, the preliminary stacked structure including a lower sacrifice layer contacting the etch stop layer, a support layer, and an upper sacrifice layer; forming a hole penetrating the preliminary stacked structure and the etch stop layer; forming a conductive pattern in the hole; removing the upper sacrifice layer and a portion of the support layer; removing the lower sacrifice layer; forming a first conductive layer covering the conductive pattern; and forming a dielectric layer covering the first conductive layer, a remaining portion of the support layer, and the etch stop layer.
    Type: Application
    Filed: February 24, 2022
    Publication date: June 9, 2022
    Inventors: CHAN-SUL JOO, JEE-HOON KIM
  • Publication number: 20220167000
    Abstract: Disclosed herein are a method, apparatus, system, and computer-readable recording medium for image compression. An encoding apparatus performs preprocessing of feature map information, frame packing, frame classification, and encoding. A decoding apparatus performs decoding, frame depacking, and postprocessing in order to reconstruct feature map information. By encoding the feature map information, inter-prediction and intra-block prediction for a frame are performed. The encoding apparatus provides the decoding apparatus with a feature map information bitstream for reconstructing the feature map information along with an image information bitstream.
    Type: Application
    Filed: November 26, 2021
    Publication date: May 26, 2022
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Hyoung-Jin KWON, Ji-Hoon DO, Dong-Hyun KIM, Youn-Hee KIM, Jong-Ho KIM, Joo-Young LEE, Se-Yoon JEONG, Jin-Soo CHOI, Tae-Jin LEE, Jee-Hoon KIM, Dong-Gyu SIM, Seoung-Jun OH, Min-Hun LEE, Yun-Gu LEE, Han-Sol CHOI, Kwang-Hwan KIM
  • Publication number: 20220108490
    Abstract: There are provided a method, apparatus, system, and computer-readable recording medium for image compression. An encoding apparatus performs domain transformation and quantization on feature map information and image information. The encoding apparatus rearranges the result of domain transformation and quantization so as to have a form advantageous to the encoding procedure and encodes the result of rearrangement, thereby generating a bitstream. A decoding apparatus receives the bitstream, decodes the received bitstream, and performs inverse transformation, dequantization, and inverse rearrangement using information transmitted through the bitstream. The result of inverse transformation, dequantization, and inverse rearrangement is used for the machine-learning task of a neural network.
    Type: Application
    Filed: October 6, 2021
    Publication date: April 7, 2022
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Hyoung-Jin KWON, Ji-Hoon DO, Dong-Hyun KIM, Youn-Hee KIM, Joo-Young LEE, Se-Yoon JEONG, Jin-Soo CHOI, Tae-Jin LEE, Jee-Hoon KIM, Dong-Gyu SIM, Seoung-Jun OH, Min-Hun LEE, Yun-Gu LEE, Han-Sol CHOI, Kwang-Hwan KIM