Abstract: An image signal processor includes a register and a disparity correction unit. The register stores disparity data obtained from a pattern image data that an image senor generates, and the image sensor includes a plurality of pixels, and each of the pixel includes at least a first photoelectric conversion element and a second photoelectric conversion element. The image sensor generates the pattern image data in response to a pattern image located at a first distance from the image sensor. The disparity correction unit corrects a disparity distortion of an image data based on the disparity data to generate a result image data, and the image senor generates the image data by capturing an object.

Abstract: A semiconductor device including a substrate having isolation films and active regions that are defined by the isolation films. The active regions extend in a first direction. A first trench is disposed on the substrate. Second trenches are disposed in the active regions. A filling film is disposed in the first trench. First gate patterns are disposed on the filling film in the first trench. Second gate patterns are disposed in the second trenches. The second gate patterns extend in a second direction that is different from the first direction. The filling film includes at least one material selected from a semiconductor material film and a metal.

Abstract: A semiconductor device including a substrate having isolation films and active regions that are defined by the isolation films. The active regions extend in a first direction. A first trench is disposed on the substrate. Second trenches are disposed in the active regions. A filling film is disposed in the first trench. First gate patterns are disposed on the filling film in the first trench. Second gate patterns are disposed in the second trenches. The second gate patterns extend in a second direction that is different from the first direction. The filling film includes at least one material selected from a semiconductor material film and a metal.

Abstract: Disclosed herein is a method of preparing trans fat-free oils and fats by an enzymatic interesterification (EI), and trans fat-free oils and fats prepared by the method. Specifically, the method comprises the steps of: 1) mixing fully hydrogenated fat derived from vegetable oil with RBD olive oil; 2) adding lipase to the mixed oil and reacting the mixed oil with lipase at 65 to 80° C. for 1 to 4 hours (1st reaction step); and 3) reacting the mixed oil from step 2) with the lipase at 40 to 60° C. for 44 to 47 hours (2nd reaction step).