Patents by Inventor Jeet Tiwari

Jeet Tiwari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060082405
    Abstract: A pseudo true single phase clock latch (pseudo “TSPC” latch) includes additional circuitry coupled to three previously floating nodes that can lose data depending upon the amount of leakage current associated with these nodes. The additional circuitry, including a positive feedback circuit, improves the performance of a true single phase clock latch circuit at lower frequencies without significant degradation in high frequency operation of the latch.
    Type: Application
    Filed: October 20, 2004
    Publication date: April 20, 2006
    Inventors: Kallol Chatterjee, Jeet Tiwari