Abstract: A display driving integrated circuit includes: a gamma voltage generator outputs a plurality of gamma voltages at a first voltage level based on a first control signal in a first time period among a plurality of time periods, outputs a plurality of gamma voltages at a second voltage level based on a second control signal in a second time period among the plurality of time periods, and outputs a reference voltage that swings between a third voltage level lower than the first voltage level and a fourth voltage level higher than the second voltage level in the plurality of time periods; and a source block circuit receives input data in response to a first clock signal in the first time period, selects a first gamma voltage among the plurality of gamma voltages of the first voltage level based on the input data, and compares the first gamma voltage and the reference voltage.

Abstract: An example display driving integrated circuit includes a gamma voltage generator, a source driver, gamma lines, a first transistor, and a second transistor. The gamma voltage generator generates gamma voltages. The source driver generates data signals based on the gamma voltages. The gamma lines connect the gamma voltage generator with the source driver, and transmit the gamma voltages. The first transistor and the second transistor connect to a first end and a second end of a first gamma line of the gamma lines. The first transistor includes a first gate for receiving a first signal. The second transistor includes a second gate for receiving a second signal. The first signal and the second signal are complementary to each other.

Abstract: A display driving circuit includes an operational amplifier configured to, in a first phase of a test period, charge a source line of a display panel based on a first voltage received through a first input terminal, and in a second phase of the test period, output a comparison result signal by comparing a second voltage received through the first input terminal with a source line voltage received through a second input terminal; a discharge circuit configured to discharge the source line in the second phase; switches configured to, in the first phase, connect an output terminal of the operational amplifier to the source line, and in the second phase, connect the discharge circuit to the source line and the second input terminal of the operational amplifier; and a control logic configured to control a bias current of the operational amplifier based on the comparison result signal.

Abstract: A display driving integrated circuit includes: a gamma voltage generator outputs a plurality of gamma voltages at a first voltage level based on a first control signal in a first time period among a plurality of time periods, outputs a plurality of gamma voltages at a second voltage level based on a second control signal in a second time period among the plurality of time periods, and outputs a reference voltage that swings between a third voltage level lower than the first voltage level and a fourth voltage level higher than the second voltage level in the plurality of time periods; and a source block circuit receives input data in response to a first clock signal in the first time period, selects a first gamma voltage among the plurality of gamma voltages of the first voltage level based on the input data, and compares the first gamma voltage and the reference voltage.

Abstract: A display driving device according to one or more example embodiments includes a source driver configured to output a data signal obtained by amplifying an input signal to a source line in a first period, and in a second period different from the first period, receive a detection signal from the source line and output a comparison result signal based on a comparison between the detection signal and the input signal; and a driving controller configured to determine a characteristic of the source line based on a timing at which a level of the comparison result signal transitions in the second period.

Abstract: A display driving circuit includes an operational amplifier configured to, in a first phase of a test period, charge a source line of a display panel based on a first voltage received through a first input terminal, and in a second phase of the test period, output a comparison result signal by comparing a second voltage received through the first input terminal with a source line voltage received through a second input terminal; a discharge circuit configured to discharge the source line in the second phase; switches configured to, in the first phase, connect an output terminal of the operational amplifier to the source line, and in the second phase, connect the discharge circuit to the source line and the second input terminal of the operational amplifier; and a control logic configured to control a bias current of the operational amplifier based on the comparison result signal.

Abstract: An example display driving integrated circuit includes a gamma voltage generator, a source driver, gamma lines, a first transistor, and a second transistor. The gamma voltage generator generates gamma voltages. The source driver generates data signals based on the gamma voltages. The gamma lines connect the gamma voltage generator with the source driver, and transmit the gamma voltages. The first transistor and the second transistor connect to a first end and a second end of a first gamma line of the gamma lines. The first transistor includes a first gate for receiving a first signal. The second transistor includes a second gate for receiving a second signal. The first signal and the second signal are complementary to each other.

Abstract: Provided is a display driving circuit including a plurality of source channels configured to provide data voltages to a plurality of data lines of a display panel, respectively; a dummy channel on one side of at least one of the source channels; and control logic configured to control operations of the source channels and the dummy channel, wherein, when failure of a first source channel from among the source channels is determined, the control logic is further configured to provide data voltages to data lines corresponding to the first source channel and second source channels, respectively, which are between the first source channel and the dummy channel, by using the second source channels and the dummy channel.

Abstract: Provided is a display driving circuit including a plurality of source channels configured to provide data voltages to a plurality of data lines of a display panel, respectively; a dummy channel on one side of at least one of the source channels; and control logic configured to control operations of the source channels and the dummy channel, wherein, when failure of a first source channel from among the source channels is determined, the control logic is further configured to provide data voltages to data lines corresponding to the first source channel and second source channels, respectively, which are between the first source channel and the dummy channel, by using the second source channels and the dummy channel.

Abstract: A display driving integrated circuit includes a timing controller, a first source driver including a first inverting input, a first non-inverting input, and a first output, a second source driver including a second inverting input, a second non-inverting input, and a second output, and a switching circuit connected with the display panel through a first and second pads. Under control of the timing controller, the switching circuit performs one of a first switching operation of connecting the first inverting input and the first output with the first pad, connecting the second inverting input and the second output with the second pad, and applying first and second decoding voltages to the non-inverting inputs, respectively; and a second switching operation of applying a sensing reference voltage to the non-inverting inputs, and connecting the output terminals with an output node, and connecting the inverting inputs with one pad.

Abstract: A display driving integrated circuit includes a timing controller, a first source driver including a first inverting input, a first non-inverting input, and a first output, a second source driver including a second inverting input, a second non-inverting input, and a second output, and a switching circuit connected with the display panel through a first and second pads. Under control of the timing controller, the switching circuit performs one of a first switching operation of connecting the first inverting input and the first output with the first pad, connecting the second inverting input and the second output with the second pad, and applying first and second decoding voltages to the non-inverting inputs, respectively; and a second switching operation of applying a sensing reference voltage to the non-inverting inputs, and connecting the output terminals with an output node, and connecting the inverting inputs with one pad.