Patents by Inventor Jeff Borgman

Jeff Borgman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136123
    Abstract: A single layer capacitor can include a substrate having a first surface and a second surface opposite the first surface. A resistive layer can be formed over at least a portion of the first surface of the substrate. A first conductive layer can be formed over at least a portion of the resistive layer. A second conductive layer can be formed over at least a portion of the second surface of the substrate. As such, the single layer capacitor can include a resistor and a capacitor formed in series with one another.
    Type: Application
    Filed: October 17, 2023
    Publication date: April 25, 2024
    Inventors: Ronald S. Demcko, Cory Nelson, Marianne Berolini, Jeff Borgman
  • Publication number: 20240136448
    Abstract: A metal-oxide-semiconductor (MOS) capacitor can include a substrate comprising a semiconductor material, an oxide layer formed over a first surface of the substrate, a resistive layer formed over at least a portion of the oxide layer, and a conductive layer formed over at least a portion of the resistive layer. As such, the MOS capacitor can include a resistor and a capacitor formed in series with one another.
    Type: Application
    Filed: October 17, 2023
    Publication date: April 25, 2024
    Inventors: Ronald S. Demcko, Cory Nelson, Marianne Berolini, Jeff Borgman
  • Publication number: 20220418081
    Abstract: A heat sink component can include a body including a thermally conductive material that is electrically non-conductive, a lower conductive layer formed over a bottom surface of the body and electrically connected with the ground plane layer, and an upper conductive layer formed over a top surface of the body. The heat sink component can have a length in an X-direction that is parallel with the top surface of the body and a thickness in a direction perpendicular to the top surface. A ratio of the length to the thickness can be greater than about 7.
    Type: Application
    Filed: June 27, 2022
    Publication date: December 29, 2022
    Inventors: Cory Nelson, Jeff Borgman, Marianne Berolini
  • Publication number: 20220367733
    Abstract: A semiconductor-based capacitor can include a substrate including a semiconductor material, an oxide layer formed over the substrate, a conductive layer formed over at least a portion of the oxide layer, a plurality of distinct coplanar upper terminals, and a lower terminal. The upper terminals and the lower terminal can be exposed along the top and bottom surfaces of the substrate, respectively, for embedding the capacitor in a substrate such as a circuit board. The semiconductor-based capacitor can be sufficiently miniaturized to be embeddable within a circuit board while providing superior capacitance values without compromising the integrity of the capacitor. For example, each of the upper terminals can have a maximum width and a thickness normal to the maximum width, and a ratio of the width to the thickness can be greater than about 80:1 to prevent physical damage to the capacitor from warping or cracking.
    Type: Application
    Filed: May 10, 2022
    Publication date: November 17, 2022
    Inventors: Cory Nelson, Jeff Borgman
  • Publication number: 20220367732
    Abstract: A semiconductor-based capacitor can include a substrate including a semiconductor material, an oxide layer formed on a surface of the substrate, a conductive layer formed over at least a portion of the oxide layer, a plurality of distinct coplanar upper terminals, and at least one lower terminal formed. Each of the upper terminals and the at least one lower terminal can be exposed along the top and bottom surfaces of the substrate, respectively, for embedding the capacitor in a substrate such as a circuit board. The semiconductor-based capacitor can be sufficiently miniaturized to be embeddable within a circuit board while providing superior capacitance values. For example, a ratio of the length to the width of the substrate can be in a range from about 3:1 to about 1:3 and an area of the substrate can be less than about 3 mm2.
    Type: Application
    Filed: May 10, 2022
    Publication date: November 17, 2022
    Inventors: Cory Nelson, Jeff Borgman