Patents by Inventor Jeff D. Stump

Jeff D. Stump has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor protection circuit having both positive and negative high voltage protection
    Patent number: 4750078
    Abstract: An input protection circuit is provided which prevents positive and negative voltages significantly higher than a supply voltage potential from damaging operational circuitry connected to an input terminal. A bipolar transistor has current conducting electrodes connected between the supply voltage and the input terminal. A first MOS transistor is coupled to the bipolar transistor for selectively eliminating a forward biased junction between the base and collector of the bipolar transistor in response to the sign and magnitude of an input signal. A second MOS transistor is coupled to the bipolar transistor for selectively eliminating a forward biased junction between the base and emitter of the bipolar transistor in responses to the sign and magnitude of the input signal.
    Type: Grant
    Filed: June 15, 1987
    Date of Patent: June 7, 1988
    Assignee: Motorola, Inc.
    Inventors: Jeffrey D. Ganger, Jeff D. Stump