Abstract: A byte-swapping circuit is provides for interfacing PCI systems to VMEbus systems. The circuit allows the PCI bus to selectively enable or disable byte swapping whether the VMEbus system is in master mode or slave mode. Also, the circuit delays the assertion of the DS0/DS1 VMEbus signals until after the byte swapping circuit has completed its operation, thus avoiding violations of the VMEbus timing specification. Finally, the circuit optimizes its performance during block transfer operations by maintaining its byte-swapping configuration constant during each bus cycle in a given block transfer. Thus, the circuit configures itself for the first bus cycle, but eliminates the reconfiguration delay for each bus cycle afterwards. The circuit can also byte-swap data bytes being transferred on the address bus during multiplexed block transfer cycles.