Abstract: An indexing system provides a more efficient and effective interface to display and manipulate large amounts of trace data from computer data and storage networks that is captured and stored in the trace memory of a protocol analyzer. An index of the trace data in the trace memory is generated by reading a selected percentage of the trace data in the trace memory. Hardware circuitry selectively identifies locations in the trace memory of trace data for desired portions of the trace data. A processor utilizes the locations identified by the hardware circuitry to generate an index for the trace data stored in the trace memory. Preferably, the hardware circuitry searches for a first time stamp encountered in each of a series of blocks of trace data and the processor utilizes the first time stamps to build a time index for the series of blocks of trace data.

Abstract: Multiple channels of a multi-channel analyzer are allocated among multiple users such that each user can initiate and retrieve the results of separate diagnostic sessions or strategies. Each analyzer channel includes an input connection port, a trace buffer memory and logic circuitry. The input connection port is operably connected to a unique node in the communication network. A host processor assigns ownership of a unique set of analyzer channels to at least two users such that each user can initiate separate simultaneously established traces on the communication network. The logic circuitry monitors frame data on the connection port at each node in accordance with a set of instructions established by the user assigned to the analyzer channel for that node, and the traces are captured in response to the set of instructions such that each user retrieves only results of the analyzer channels assigned to that user.

Abstract: Multiple channels of a multi-channel analyzer are allocated among multiple users such that each user can initiate and retrieve the results of separate diagnostic sessions or strategies. Each analyzer channel of the multi-channel analyzer includes an input connection port, a trace buffer memory and logic circuitry. The input connection port of each analyzer channel is operably connected to a unique node in the communication network. A host processor connected to each analyzer channel assigns ownership of a unique set of analyzer channels to at least two different users such that each user can initiate separate traces that are simultaneously established on the communication network.

Abstract: Multiple channels of a multi-channel analyzer are allocated among multiple users such that each user can initiate and retrieve the results of separate diagnostic sessions. Each analyzer channel includes an input connection port, a trace buffer memory and logic circuitry. Each input connection port is operably connected to a unique node in the communication network. A host processor connected to each analyzer channel assigns ownership of a unique set of analyzer channel to at least two different users such that each user can initiate separate traces that are simultaneously established on the connection port at each node in accordance with a set of instructions established by the user assigned to the analyzer channel for that node, and the traces are captured in response to the set of instructions for each analyzer channel such that each user retrieves only the results of the analyzer channels assigned to that user.

Abstract: An indexing system provides a more efficient and effective interface to display and manipulate large amounts of trace data from computer data and storage networks that is captured and stored in the trace memory of a protocol analyzer. An index of the trace data in the trace memory is generated by reading a selected percentage of the trace data in the trace memory. Hardware circuitry selectively identifies locations in the trace memory of trace data for desired portions of the trace data. A processor utilizes the locations identified by the hardware circuitry to generate an index for the trace data stored in the trace memory. Preferably, the hardware circuitry searches for a first time stamp encountered in each of a series of blocks of trace data and the processor utilizes the first time stamps to build a time index for the series of blocks of trace data.

Abstract: An indexing system provides a more efficient and effective interface to display and manipulate large amounts of trace data from computer data and storage networks that is captured and stored in the trace memory of a protocol analyzer. An index of the trace data in the trace memory is generated by reading a selected granularity percentage of the trace data in the trace memory. A host processor connected to the protocol analyzer generates at least two graphic representations on a computer display device of the trace data in response to and based on the index. A first graphic representation is generated by setting the selected granularity percentage at a first percentage and a second graphic representation similar to the first graphic representation generated while the first graphic representation is being displayed by setting the selected percentage at a second percentage that is greater than the first percentage to regenerate the index.

Abstract: Multiple channels of a multi-channel analyzer are allocated among multiple users such that each user can initiate and retrieve the results of separate diagnostic sessions or strategies. Each analyzer channel of the multi-channel analyzer includes an input connection port, a trace buffer memory and logic circuitry. The input connection port of each analyzer channel is operably connected to a unique node in the communication network. A host processor connected to each analyzer channel assigns ownership of a unique set of analyzer channels to at least two different users such that each user can initiate separate traces that are simultaneously established on the communication network.