Patents by Inventor Jefferson Lu

Jefferson Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6998277
    Abstract: A method of planarizing a spin-on material layer is provided. A substrate having a plurality of openings thereon is provided. A spin-on material layer is formed on the substrate such that the openings are completely filled. A plasma etching process is carried out to remove a portion of the spin-on material layer and expose the substrate surface. During the plasma etching process, the substrate is cooled to maintain an etching selectivity between the spin-on material layer on the substrate surface and the spin-on material layer within the openings so that a planar spin-on material layer is ultimately obtained.
    Type: Grant
    Filed: September 15, 2004
    Date of Patent: February 14, 2006
    Assignee: ProMOS Technologies, Inc.
    Inventors: Jefferson Lu, Nien-Yu Tsai, Shu-Ching Yang
  • Publication number: 20050196879
    Abstract: A method of planarizing a spin-on material layer is provided. A substrate having a plurality of openings thereon is provided. A spin-on material layer is formed on the substrate such that the openings are completely filled. A plasma etching process is carried out to remove a portion of the spin-on material layer and expose the substrate surface. During the plasma etching process, the substrate is cooled to maintain an etching selectivity between the spin-on material layer on the substrate surface and the spin-on material layer within the openings so that a planar spin-on material layer is ultimately obtained.
    Type: Application
    Filed: September 15, 2004
    Publication date: September 8, 2005
    Inventors: Jefferson Lu, Nien-Yu Tsai, Shu-Ching Yang
  • Patent number: 6743726
    Abstract: A method for manufacturing a semiconductor device that includes providing a substrate, providing a dielectric layer over the substrate, depositing a layer of anti-reflective coating over the dielectric layer, providing a layer of photoresist over the layer of anti-reflective coating, patterning and defining the photoresist layer to provide a plurality of photoresist structures, wherein at least two adjacent photoresist structures provide a first distance, anisotropically etching the layer of anti-reflective coating unmasked by the photoresist structures to remove only a portion of the anti-reflective coating layer, etching the anti-reflective coating to completely remove the layer of anti-reflective coating unmasked by the photoresist structures, and etching the dielectric layer to form at least one trench between the at least two adjacent photoresist structures, wherein the first distance is substantially equal to a second distance defining an opening at the top of the trench.
    Type: Grant
    Filed: July 11, 2002
    Date of Patent: June 1, 2004
    Assignee: ProMOS Technologies, Inc.
    Inventors: Jefferson Lu, Nien-Yu Tsai
  • Publication number: 20040009672
    Abstract: A method for manufacturing a semiconductor device that includes providing a substrate, providing a dielectric layer over the substrate, depositing a layer of anti-reflective coating over the dielectric layer, providing a layer of photoresist over the layer of anti-reflective coating, patterning and defining the photoresist layer to provide a plurality of photoresist structures, wherein at least two adjacent photoresist structures provide a first distance, anisotropically etching the layer of anti-reflective coating unmasked by the photoresist structures to remove only a portion of the anti-reflective coating layer, etching the anti-reflective coating to completely remove the layer of anti-reflective coating unmasked by the photoresist structures, and etching the dielectric layer to form at least one trench between the at least two adjacent photoresist structures, wherein the first distance is substantially equal to a second distance defining an opening at the top of the trench.
    Type: Application
    Filed: July 11, 2002
    Publication date: January 15, 2004
    Applicant: ProMos Technologies, Inc.
    Inventors: Jefferson Lu, Nien-Yu Tsai