Patents by Inventor Jeffery A. Shields

Jeffery A. Shields has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Damascene metal-insulator-metal (MIM) device with improved scaleability
    Patent number: 9343666
    Abstract: A present method of fabricating a memory device includes the steps of providing a dielectric layer, providing an opening in the dielectric layer, providing a first conductive body in the opening, providing a switching body in the opening, the first conductive body and switching body filling the opening, and providing a second conductive body over the switching body. In an alternate embodiment, a second dielectric layer is provided over the first-mentioned dielectric layer, and the switching body is provided in an opening in the second dielectric layer.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: May 17, 2016
    Assignee: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Suzette K. Pangrle, Steven Avanzino, Sameer Haddad, Michael Vanbuskirk, Manuj Rathor, James Xie, Kevin Song, Christie Marrian, Bryan Choo, Fei Wang, Jeffery A. Shields
  • DAMASCENE METAL-INSULATOR-METAL (MIM) DEVICE IMPROVED SCALEABILITY
    Publication number: 20120276706
    Abstract: A present method of fabricating a memory device includes the steps of providing a dielectric layer;, providing an opening in the dielectric layer, providing a first conductive body in the opening, providing a switching body in the opening, the first conductive body and switching body Filling the opening, and providing a second conductive body over the switching body. In an alternate embodiment, a second dielectric layer is provided over the first-mentioned dielectric layer, and the switching body is provided in an opening in the second dielectric layer.
    Type: Application
    Filed: June 21, 2012
    Publication date: November 1, 2012
    Inventors: Suzette K. PANGRLE, Steven AVANZINO, Sameer HADDAD, Michael VANBUSKIRK, Manuj RATHOR, James XIE, Kevin SONG, Christie MARRIAN, Bryan CHOO, Fei WANG, Jeffery A. SHIELDS
  • BURIED SILICIDE LOCAL INTERCONNECT WITH SIDEWALL SPACERS AND METHOD FOR MAKING THE SAME
    Publication number: 20120038051
    Abstract: A buried local interconnect and method of forming the same counterdopes a region of a doped substrate to form a counterdoped isolation region. A hardmask is formed and patterned on the doped substrate, with a recess being etched through the patterned hardmask into the counterdoped region. Dielectric spacers are formed on the sidewalls of the recess, with a portion of the bottom of the recess being exposed. A metal is then deposited in the recess and reacted to form silicide at the bottom of the recess. The recess is filled with fill material, which is polished. The hardmask is then removed to form a silicide buried local interconnect.
    Type: Application
    Filed: October 26, 2011
    Publication date: February 16, 2012
    Applicants: SPANSION LLC, ADVANCED MICRO DEVICES, INC.
    Inventors: Arvind Halliyal, Zoran Krivokapic, Matthew S. Buynoski, Nicholas H. Tripsas, Minh Van Ngo, Mark T. Ramsbey, Jeffery A. Shields, Jusuke Ogura
  • Buried silicide local interconnect with sidewall spacers and method for making the same
    Patent number: 7786003
    Abstract: A buried local interconnect and method of forming the same counterdopes a region of a doped substrate to form a counterdoped isolation region. A hardmask is formed and patterned on the doped substrate, with a recess being etched through the patterned hardmask into the counterdoped region. Dielectric spacers are formed on the sidewalls of the recess, with a portion of the bottom of the recess being exposed. A metal is then deposited in the recess and reacted to form silicide at the bottom of the recess. The recess is filled with fill material, which is polished. The hardmask is then removed to form a silicide buried local interconnect.
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: August 31, 2010
    Assignees: Advanced Micro Devices, Inc., Spansion LLC
    Inventors: Arvind Halliyal, Zoran Krivokapic, Matthew S. Buynoski, Nicholas H. Tripsas, Minh Van Ngo, Mark T. Ramsbey, Jeffery A. Shields, Jusuke Ogura