Patents by Inventor Jeffery A. Sprouse

Jeffery A. Sprouse has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Real time observation serial scan test architecture
    Patent number: 6035262
    Abstract: Logic circuitry in the form of an integrated circuit includes a number of scannable registers located at various locations of the logic circuitry to continuously sample signal states thereat. In response to signalling from a maintenance diagnostic processor the scannable registers can be commanded to freeze their content for extraction and observation to determining the operating condition of the logic circuitry.
    Type: Grant
    Filed: June 27, 1994
    Date of Patent: March 7, 2000
    Assignee: Tandem Computers Incorporated
    Inventors: Walter E. Gibson, Jeffery A. Sprouse, Eduardo M. Lipiansky, Javad Khakbaz, Michael A. Plum, Philip R. Manela, Ko Yamamoto