Abstract: A comparator is disclosed. The comparator includes a mirror circuit that is electrically coupled to a first voltage source and a second voltage source. The first voltage source produces a first voltage and the second voltage source produces a second voltage. The comparator also includes a first positive metal oxide semiconductor (PMOS) transistor electrically coupled to the first voltage source and an output terminal. The first PMOS transistor is biased by the mirror circuit. The comparator also includes a first negative metal oxide semiconductor (NMOS) that is electrically coupled to a ground terminal and the output terminal. The first NMOS transistor is also biased by the mirror circuit. An electrical current flowing across the first NMOS transistor is mirrored from an electrical current flowing through the first PMOS transistor. A method to operate the comparator and a comparator system is also disclosed.

Abstract: Booster circuitry is provided that contains capacitor protection circuitry. The booster circuitry receives a digital input signal on an input line and provides a corresponding boosted digital output signal on an output line. The digital input signal may be received from an oscillator. The digital output signal may be a clock that is applied to a charge pump on a programmable logic device integrated circuit. The booster circuitry contains a metal-oxide-semiconductor capacitor. The capacitor protection circuitry ensures that the voltage across the capacitor in the booster circuit remains above a desired minimum voltage and below a desired maximum voltage during operation. The capacitor protection circuitry includes a control circuit that monitors the capacitor voltage when the booster circuit is operated while the oscillator is off and transistor-based circuitry that discharges one of the capacitor's terminals to a predetermined level when the booster circuit is operated while the oscillator is on.