Patents by Inventor Jeffery Chu

Jeffery Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and device for wafer backside alignment overlay accuracy
    Patent number: 7494830
    Abstract: A method for wafer backside alignment overlay accuracy includes forming a buried layer on a front-side of a wafer; forming a conductive layer on the buried layer and patterning a first test structure and a second test structure therein; forming an etch stop layer on the conductive layer; etching through the wafer from the backside to perform an alignment process with the first test structure; and determining an overlay accuracy of the alignment process with the second test structure. The first test structure includes an optical vernier and the second test structure includes an electrical testing structure.
    Type: Grant
    Filed: April 6, 2007
    Date of Patent: February 24, 2009
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Sheng-Chieh Liu, Tzu-Yang Wu, Ya-Wen Lee, Jeffery Chu, Hsueh-Liang Chou, Chia-Hung Kao