Abstract: This disclosure relates generally to system modeling, and more particularly to systems and methods for modeling computer resource metrics. In one embodiment, a processor-implemented computer resource metric modeling method is disclosed. The method may include detecting one or more statistical trends in aggregated interaction data for one or more interaction types, and mapping each interaction type to one or more devices facilitating the transactions. The method may further include generating one or more linear regression models of a relationship between device utilization and interaction volume, and calculating one or more diagnostic statistics for the one or more linear regression models. A subset of the linear regression models may be filtered out based on the one or more diagnostic statistics. One or more forecasts may be generated using the remaining linear regression models, using which a report may be generated and provided.

Abstract: This disclosure relates generally to system modeling, and more particularly to systems and methods for modeling computer resource metrics. In one embodiment, a processor-implemented computer resource metric modeling method is disclosed. The method may include detecting one or more statistical trends in aggregated interaction data for one or more interaction types, and mapping each interaction type to one or more devices facilitating the transactions. The method may further include generating one or more linear regression models of a relationship between device utilization and interaction volume, and calculating one or more diagnostic statistics for the one or more linear regression models. A subset of the linear regression models may be filtered out based on the one or more diagnostic statistics. One or more forecasts may be generated using the remaining linear regression models, using which a report may be generated and provided.

Abstract: This disclosure relates generally to system modeling, and more particularly to systems and methods for modeling computer resource metrics. In one embodiment, a processor-implemented computer resource metric modeling method is disclosed. The method may include detecting one or more statistical trends in aggregated interaction data for one or more interaction types, and mapping each interaction type to one or more devices facilitating the transactions. The method may further include generating one or more linear regression models of a relationship between device utilization and interaction volume, and calculating one or more diagnostic statistics for the one or more linear regression models. A subset of the linear regression models may be filtered out based on the one or more diagnostic statistics. One or more forecasts may be generated using the remaining linear regression models, using which a report may be generated and provided.

Abstract: This disclosure relates generally to system modeling, and more particularly to systems and methods for modeling computer resource metrics. In one embodiment, a processor-implemented computer resource metric modeling method is disclosed. The method may include detecting one or more statistical trends in aggregated interaction data for one or more interaction types, and mapping each interaction type to one or more devices facilitating the transactions. The method may further include generating one or more linear regression models of a relationship between device utilization and interaction volume, and calculating one or more diagnostic statistics for the one or more linear regression models. A subset of the linear regression models may be filtered out based on the one or more diagnostic statistics. One or more forecasts may be generated using the remaining linear regression models, using which a report may be generated and provided.

Abstract: A magnetic memory cell and a method for implementing the magnetic memory cell for use in Solid-State Drives (SSDs) are provided. A magnetic memory cell includes a first conductor M1, and a second conductor M2 and a programmable area using unpatterned programmable magnetic media. At least one of the conductors M1, M2 is formed of a magnetic material, and the conductor M2 is more conductive than conductor M1. Steering of current is provided for programming the magnetic memory cell.

Abstract: A magnetic memory integrated with complementary metal oxide semiconductor (CMOS) driving circuits and a method for implementing magnetic memory integrated with complementary metal oxide semiconductor (CMOS) driving circuits for use in Solid-State Drives (SSDs) are provided. A complementary metal oxide semiconductor (CMOS) wafer is provided, and a magnetic memory is formed on top of the CMOS wafer providing a functioning magnetic memory chip.

Abstract: A magnetic memory pillar cell and a method for implementing the magnetic memory cell for use in Solid-State Drives (SSDs) are provided. A magnetic memory cell includes a first conductor M1, and a second conductor M2, the second conductor M1 surrounded by the first conductor M1 and a programmable area using unpatterned programmable magnetic media. At least one of the conductors M1, M2 is formed of a magnetic material, and the conductor M2 is more conductive than conductor M1. An oxide barrier extends between the first conductor M1 and a programmable input to the magnetic memory pillar cell; and the oxide barrier is unpatterned.

Abstract: A magnetic memory pillar cell and a method for implementing the magnetic memory cell for use in Solid-State Drives (SSDs) are provided. A magnetic memory cell includes a first conductor M1, and a second conductor M2, the second conductor M1 surrounded by the first conductor M1 and a programmable area using unpatterned programmable magnetic media. At least one of the conductors M1, M2 is formed of a magnetic material, and the conductor M2 is more conductive than conductor M1. An oxide barrier extends between the first conductor M1 and a programmable input to the magnetic memory pillar cell; and the oxide barrier is unpatterned.

Abstract: A magnetic memory integrated with complementary metal oxide semiconductor (CMOS) driving circuits and a method for implementing magnetic memory integrated with complementary metal oxide semiconductor (CMOS) driving circuits for use in Solid-State Drives (SSDs) are provided. A complementary metal oxide semiconductor (CMOS) wafer is provided, and a magnetic memory is formed on top of the CMOS wafer providing a functioning magnetic memory chip.

Abstract: A magnetic memory cell and a method for implementing the magnetic memory cell for use in Solid-State Drives (SSDs) are provided. A magnetic memory cell includes a first conductor M1, and a second conductor M2 and a programmable area using unpatterned programmable magnetic media. At least one of the conductors M1, M2 is formed of a magnetic material, and the conductor M2 is more conductive than conductor M1. Steering of current is provided for programming the magnetic memory cell.

Abstract: This disclosure relates generally to system modeling, and more particularly to systems and methods for modeling computer resource metrics. In one embodiment, a processor-implemented computer resource metric modeling method is disclosed. The method may include detecting one or more statistical trends in aggregated interaction data for one or more interaction types, and mapping each interaction type to one or more devices facilitating the transactions. The method may further include generating one or more linear regression models of a relationship between device utilization and interaction volume, and calculating one or more diagnostic statistics for the one or more linear regression models. A subset of the linear regression models may be filtered out based on the one or more diagnostic statistics. One or more forecasts may be generated using the remaining linear regression models, using which a report may be generated and provided.

Abstract: A magnetic memory pillar cell and a method for implementing the magnetic memory cell for use in Solid-State Drives (SSDs) are provided. A magnetic memory cell includes a first conductor M1, and a second conductor M2, the second conductor M1 surrounded by the first conductor M1 and a programmable area using unpatterned programmable magnetic media. At least one of the conductors M1, M2 is formed of a magnetic material, and the conductor M2 is more conductive than conductor M1. An oxide barrier extends between the first conductor M1 and a programmable input to the magnetic memory pillar cell; and the oxide barrier is unpatterned.

Abstract: A three-dimensional (3D) scalable magnetic memory array and a method for implementing the three-dimensional (3D) scalable magnetic memory array for use in Solid-State Drives (SSDs) are provided. A three-dimensional (3D) scalable magnetic memory array includes an interlayer dielectric (IDL) stack of word planes separated by a respective IDL. A plurality of pillar holes is formed in the IDL stack in a single etch step; each of the pillar holes including an oxide barrier coating, and a first conductor M1, and a second conductor M2 forming magnetic pillar memory cells. The first conductor M1 is formed of a magnetic material, and the second conductor M2 is more electrically conductive than the conductor M1; and each of the magnetic pillar memory cell inside the pillar holes have a programmable area using unpatterned programmable magnetic media proximate to a respective one of the word planes.

Abstract: The present invention relates to a clamp that can be used for repairing a rupture in a pipe. The clamp includes a wrapping assembly comprising strapping that at least partially extends about the pipe, an adjustment device that is suitably in form of a claps for adjusting the effective length of the strapping about the pipe and a tensioning device that is suitably in the form an over center lever mechanism that is operable to place the wrapping assembly under different tensions.

Abstract: The present invention relates to a clamp that can be used for repairing a rupture in a pipe. The clamp includes a wrapping assembly comprising strapping that at least partially extends about the pipe, an adjustment device that is suitably in form of a claps for adjusting the effective length of the strapping about the pipe and a tensioning device that is suitably in the form an over centre lever mechanism that is operable to place the wrapping assembly under different tensions.

Abstract: A portable safety barrier that can be set up across a drive way or other path to provide a visible and physical indication of a safe zone boundary particularly for children. Netting attached to a core or reel disposed in a housing forms the barrier. The netting is free to deploy from the housing for attachment to a remote post; both the housing and post including an auger for anchoring the housing and post to ground. The housing has a rewind system to reel in the netting which includes a gear train for mechanical advantage. The rewind system operates manually and with out a bias assist. A selectively operated stop cooperates with the rewind system to tighten the netting after deployment and keeps the netting taut.

Abstract: The invention relates to polypeptides and modified polypeptides derived from fibrinogen comprising one of the following sequences: X1FLAEX6X7X8V DX2LAEX6X7X8V DFX3AEX6X7X8V DFLX4EX6X7X8V DFLAX5X6X7X8V DFLAEX6X7X8V DFLAEX6X7X8X9 wherein X is any amino acid residue and which polypeptide has anti-angiogenic activity.

Abstract: The invention relates to anti-angiogenic peptides derived from fibrinogen; pharmaceutical compositions comprising said peptides; nucleic acids encoding said peptides and methods to treat animals, preferably humans, suffering from diseases which would benefit from the inhibition of angiogenesis.

Abstract: A combination dowel-hole and pocket-hole drill comprising a motor/handle assembly, a pivoting platform, a fence system, and a base assembly. The motor/handle assembly includes a shoe structure enabling the motor/handle assembly to slide along grooves in the pivoting platform. The pivoting platform can be set at various angles to the base advantageous to either drilling a dowel hole or drilling a pocket hole. An adjustable stop rod on the pivoting platform sets the depth of plunge for drilling operations. The fence system consists of an upper fence primarily used for dowel hole drilling operations and a lower fence primarily used for pocket hole drilling operations. The upper fence slides perpendicular to the cutting tool and sets the distance of the dowel hole from the top surface of the workpiece. The lower fence slides parallel to the base assembly and sets the entry point for the pocket hole drill bit. This entry point is determined by the workpiece thickness.