Abstract: Disclosed is a circuit for preventing charging damage in an integrated circuit design, for example, a design having silicon over insulator (SOI) transistors. The circuit prevents damage from charging during processing to the gate of IC devices by assigning regions to the IC design such that the devices located within the regions have electrically independent nets, identifying devices that may have a voltage differential between the source or drain, and gate as susceptible devices within a given region, and connecting an element across the source or drain, and the gate of each of the susceptible devices such that the element is positioned within the region. Alternatively, the method/circuit provides for connecting compensating conductors to an element to eliminate potential charging damage.