Abstract: Various embodiments of the present technology may comprise a method and apparatus for an image sensor. The image sensor may be configured as a stacked image sensor with two or more chips stacked vertically. The image sensor may comprise a plurality of pixel circuits, wherein portions of the pixel circuit are arranged on separate chips. Each pixel circuit may comprise an amplifier with a first feedback network to increase the sensor sensitivity, to reduce noise in the pixel signal, and to reduce the voltage swing on the FD node. Each pixel circuit may further comprise a second feedback network to stabilize the common-mode voltage of the pixel signal amplifier.

Abstract: A pixel circuit includes a pixel-capture device having a pixel node and operable to convert light intensity into a pixel signal at the pixel node, the pixel signal representing a captured pixel. A row node carries a row signal that is operable to both (a) enable passage of the pixel signal from the pixel node to a column node during a readout phase of the captured pixel, and (b) set the pixel node to a predetermined signal level during a reset phase of the captured pixel. The reset phase and the readout phase are configured to occur during different time intervals. A reset node is included for carrying a reset signal that is operable together with the row signal to (a) enable passage from the pixel node to the column node during the readout phase, and (b) set the pixel node to predetermined signal level during the reset phase.

Abstract: An analog sampling circuit comprising a plurality of capacitors is used to sample the reset and video sampling levels at different instants in time to obtain a plurality of respective reset sampling values and a plurality of respective video sampling values. The reset sampling values are then averaged to obtain an average reset sampling value. Likewise, the video sampling values are averaged to obtain an average video sampling value. By averaging the reset sampling values and the video sampling values over time in this manner, random telegraph noise in the reset and video sampling values is eliminated or at least substantially reduced.

Abstract: A delay circuit is provided that delays the sampling signal by a selected amount in order to ensure that sampling does not occur concurrently with the occurrence of a noisy event. The noisy events on the IC tend to be periodic and occur at regular intervals. The invention allows the delay in the sampling signal to be adjusted such that sampling does not occur at the same time as the reoccurring noisy event. This ensures that the sample signals will not have noise in them resulting from the occurrence of the noisy event. In addition, the delay circuit is programmable to allow the amount of delay to be set on the fly.

Abstract: An image sensor device formed in an integrated circuit (IC) having a filter device in which filter elements are arranged to provide color symmetry with respect to an optical center of the imaging array of pixels. This color symmetry ensures that any color cross-talk that occurs will be symmetrical with respect to the optical center of the imaging array and will result in a color error that is radial and easily correctable using color interpolation.

Abstract: An image sensor device is provided that has an uncovered imaging array of pixels and a covered global reference non-imaging array of pixels. The pixel samples of the global reference non-imaging array are used to remove noise from the pixel samples of the imaging array. The control signals and control lines that are used to sample the pixels of the imaging array are separate from and independent of the control signals and control lines that are used to sample the pixels of the global reference non-imaging array of pixels. For each row of pixels of the imaging array that is sampled, the same row of pixels of the global reference non-imaging array is sampled. The global reference row has no or very few offsets or variations to ensure that noise removal is performed effectively.

Abstract: An active pixel sensor array sampling system includes a plurality of video circuits and reset circuits. A video circuit generates a video voltage from each one of the pixels of a column of pixels. An associated reset circuit generates a reset voltage for each of the pixels of a column of pixels. The video circuits and the reset circuits are closed loop sample and hold circuits. The active pixel sensor array is integrated on an integrated circuit.

Abstract: A pixel circuit includes a pixel-capture device having a pixel node and operable to convert light intensity into a pixel signal at the pixel node, the pixel signal representing a captured pixel. A row node carries a row signal that is operable to both (a) enable passage of the pixel signal from the pixel node to a column node during a readout phase of the captured pixel, and (b) set the pixel node to a predetermined signal level during a reset phase of the captured pixel. The reset phase and the readout phase are configured to occur during different time intervals. A reset node is included for carrying a reset signal that is operable together with the row signal to (a) enable passage from the pixel node to the column node during the readout phase, and (b) set the pixel node to the predetermined signal level during the reset phase.

Abstract: An active pixel sensor array sampling system includes a plurality of video circuits and reset circuits. A video circuit generates a video voltage from each one of the pixels of a column of pixels. An associated reset circuit generates a reset voltage for each of the pixels of a column of pixels. The video circuits and the reset circuits are closed loop sample and hold circuits. The active pixel sensor array is integrated on an integrated circuit.

Abstract: A pixel circuit includes a silicon substrate having a photodiode that converts light intensity into a voltage signal and two metal layers disposed on the substrate having a pixel control circuit. The first metal layer includes a row trace and a reset trace and the second metal layer includes a column trace and a voltage supply trace. The row trace carries a signal that activates a switch for coupling the photodiode to the column trace during a readout phase and clears the voltage at the photodiode during a reset phase. The column trace interfaces with a signal capture circuit in a CMOS array of pixels for capturing a digital image that corresponds to each voltage level at each photodiode.

Abstract: An image sensor device formed in an integrated circuit (IC) having a filter device in which filter elements are arranged to provide color symmetry with respect to an optical center of the imaging array of pixels. This color symmetry ensures that any color cross-talk that occurs will be symmetrical with respect to the optical center of the imaging array and will result in a color error that is radial and easily correctable using color interpolation.

Abstract: An analog sampling circuit comprising a plurality of capacitors is used to sample the reset and video sampling levels at different instants in time to obtain a plurality of respective reset sampling values and a plurality of respective video sampling values. The reset sampling values are then averaged to obtain an average reset sampling value. Likewise, the video sampling values are averaged to obtain an average video sampling value. By averaging the reset sampling values and the video sampling values over time in this manner, random telegraph noise in the reset and video sampling values is eliminated or at least substantially reduced.

Abstract: An active pixel sensor (APS) image sensor comprises an array of pixel circuits corresponding to rows and columns of pixels, a plurality of amplifiers that buffer signals output by the array of pixel circuits, and a plurality of sample and hold circuits that read the buffered signals. A routing mechanism is positioned between the array of pixel circuits and the plurality of amplifiers.

Abstract: A delay circuit is provided that delays the sampling signal by a selected amount in order to ensure that sampling does not occur concurrently with the occurrence of a noisy event. The noisy events on the IC tend to be periodic and occur at regular intervals. The invention allows the delay in the sampling signal to be adjusted such that sampling does not occur at the same time as the reoccurring noisy event. This ensures that the sample signals will not have noise in them resulting from the occurrence of the noisy event. In addition, the delay circuit is programmable to allow the amount of delay to be set on the fly.

Abstract: An image sensor device is provided that has an uncovered imaging array of pixels and a covered global reference non-imaging array of pixels. The pixel samples of the global reference non-imaging array are used to remove noise from the pixel samples of the imaging array. The control signals and control lines that are used to sample the pixels of the imaging array are separate from and independent of the control signals and control lines that are used to sample the pixels of the global reference non-imaging array of pixels. For each row of pixels of the imaging array that is sampled, the same row of pixels of the global reference non-imaging array is sampled. The global reference row has no or very few offsets or variations to ensure that noise removal is performed effectively.

Abstract: An ink-jet printhead having a thin film substrate, the substrate including a plurality of thin film layers including a gold thin film layer overlying a tantalum thin film layer, an underlying passivation layer and an aluminum thin film layer underlying the passivation layer. A portion of the substrate is disposed adjacent an outer edge thereof and an ink barrier layer overlies the thin film substrate, the barrier layer having a first edge. The substrate portion extends beyond the barrier layer first edge. A plurality of bond pads is disposed on the substrate portion. Power and ground traces are coupled to a respective bond pad and are dropped through vias in the substrate portion to the thin film aluminum layer underlying the passivation layer. The traces are returned through vias to the gold thin film layer at a location separated from the barrier first edge.