Patents by Inventor Jeffrey A. Boye

Jeffrey A. Boye has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11316656
    Abstract: A time transfer modem includes a radio frequency integrated circuit (RFIC), a radio frequency (RF) front end, and processing circuitry. The RF front end is configured to receive and up-convert an input for time transfer with a remote station to generate an up-converted timing signal centered at a select frequency that is outside of a frequency range of interest but within an operational frequency range of the RFIC. The RF front end may also be configured to attenuate, via a pre-selection filter, up-converted adjacent signals to generate a filtered timing signal at the select frequency. The RFIC may be configured to down-convert and digitize the filtered timing signal to generate a digitized timing signal for signal processing by the processing circuitry to determine a clock difference between a local clock signal and the digitized timing signal that originated from the remote station.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: April 26, 2022
    Assignee: The Johns Hopkins University
    Inventors: Norman H. Adams, Jeffrey A. Boye, Adam V. Crifasi, Blair C. Fonville, Ian M. Hughes, Amit Shah, Gregory L. Weaver, John F. Youssef, Darrell A. Zinn
  • Publication number: 20220116197
    Abstract: A time transfer modem includes a radio frequency integrated circuit (RFIC), a radio frequency (RF) front end, and processing circuitry. The RF front end is configured to receive and up-convert an input for time transfer with a remote station to generate an up-converted timing signal centered at a select frequency that is outside of a frequency range of interest but within an operational frequency range of the RFIC. The RF front end may also be configured to attenuate, via a pre-selection filter, up-converted adjacent signals to generate a filtered timing signal at the select frequency. The RFIC may be configured to down-convert and digitize the filtered timing signal to generate a digitized timing signal for signal processing by the processing circuitry to determine a clock difference between a local clock signal and the digitized timing signal that originated from the remote station.
    Type: Application
    Filed: May 6, 2021
    Publication date: April 14, 2022
    Inventors: Norman H. Adams, Jeffrey A. Boye, Adam V. Crifasi, Blair C. Fonville, Ian M. Hughes, Amit Shah, Gregory L. Weaver, John F. Youssef, Darrell A. Zinn