Patents by Inventor Jeffrey A. Carlson

Jeffrey A. Carlson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210122890
    Abstract: Presently described are polylactic acid polymer based films comprising a structured surface and articles. In one embodiment, the film comprises a semicrystalline polylactic acid polymer; a second polymer such as polyvinyl acetate polymer having a glass transition temperature (Tg) of at least 25° C.; and plasticizer. Articles are also described such as a tape or sheet, comprising the structured PLA-based film and a layer of (e.g. pressure sensitive) adhesive disposed on the film. In some embodiments, the tape or sheet further comprises a low adhesion backsize or a release liner. The article can be suitable for various end-uses. In one embodiment, the tape is a paint masking tape. In another embodiment, the tape is a floor marking tape.
    Type: Application
    Filed: February 6, 2017
    Publication date: April 29, 2021
    Inventors: Derek J. Dehn, Graham M. Clarke, Joseph T. Bartusiak, Ning Zhou, Jeffrey A. Carlson
  • Publication number: 20190218423
    Abstract: An article is described such as a tape or sheet, comprising a PLA-based film and a layer of (e.g. pressure sensitive) adhesive disposed on the film. The PLA-based film comprises a semicrystalline polylactic acid polymer; a second polymer such as polyvinyl acetate polymer having a glass transition temperature (Tg) of at least 25° C.; and plasticizer. The tape or sheet may further comprises a low adhesion backsize or a release liner. The article can be suitable for various end-uses. In one embodiment, the tape is a paint masking tape. In another embodiment, the tape is a floor marking tape.
    Type: Application
    Filed: December 5, 2016
    Publication date: July 18, 2019
    Inventors: Joseph T. Bartusiak, Ning Zhou, Derek J. Dehn, Jeffrey O. Emslander, Corinne E. Lipscomb, Jayshree Seth, Jeffrey A. Carlson
  • Patent number: 10222851
    Abstract: A method and apparatus for providing proactive current protection. In one embodiment, the method comprises: prior to transitioning to a new state for an integrated circuit (IC), calculating a sum of expected powers for a plurality of domains in the IC by calculating an expected current for each of the plurality of domains based on an individual domain frequency in the new state and multiplying the expected current with its associated voltage for each of the plurality of domains for the new state; comparing the sum to a power limit; and if the sum is greater than the power limit, then reducing the individual domain frequency associated with at least one domain in the plurality of domains to maintain the total instantaneous power of the IC below the power limit.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: March 5, 2019
    Assignee: INTEL CORPORATION
    Inventors: Efraim Rotem, Nir Rosenzweig, Doron Rajwan, Nadav Shulman, Gal Leibovich, Tomer Ziv, Amit Gabai, Jorge P. Rodriguez, Jeffrey A. Carlson
  • Publication number: 20180188799
    Abstract: In some examples, a charging system includes a battery and a power device. The power device is to be coupled in series with the battery in a manner that the power device is not in a system load path. The power device is to operate as a linear voltage regulator to control charging power.
    Type: Application
    Filed: December 31, 2016
    Publication date: July 5, 2018
    Applicant: INTEL CORPORATION
    Inventors: Chee Lim Nge, Alexander B. Uan-Zo-Li, Philip R. Lehwalder, Jenn Chuan Cheng, Jeffrey A. Carlson
  • Patent number: 9995791
    Abstract: Examples are disclosed for an integrated circuit (IC) device coupled to a battery-operated power supply unit, such as an IC in a mobile computing device or wireless phone, to accurately determine energy usage drawn from the power supply unit under rapidly dynamic circumstances. A current sense signal of a power line from the power supply unit is digitized. The digitized current sense is added to an accumulator at a rate that is approximately proportional to a voltage of the power line from the power supply unit. The accumulator is then outputted and scaled to units relevant to energy measurements. The energy measurement is used to estimate remaining battery life. Triggering the digitization of the current sense signal may be by use of a pulse generation circuit, or by use of an overflow indicator of an accumulator for a digitized voltage sense signal. Other examples are described and claimed.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: June 12, 2018
    Assignee: INTEL CORPORATION
    Inventors: Efraim Rotem, Nir Rosenzweig, Jeffrey A. Carlson, Philip R. Lehwalder, Nadav Shulman, Doron Rajwan
  • Publication number: 20170038815
    Abstract: A method and apparatus for providing proactive current protection. In one embodiment, the method comprises: prior to transitioning to a new state for an integrated circuit (IC), calculating a sum of expected powers for a plurality of domains in the IC by calculating an expected current for each of the plurality of domains based on an individual domain frequency in the new state and multiplying the expected current with its associated voltage for each of the plurality of domains for the new state; comparing the sum to a power limit; and if the sum is greater than the power limit, then reducing the individual domain frequency associated with at least one domain in the plurality of domains to maintain the total instantaneous power of the IC below the power limit.
    Type: Application
    Filed: October 21, 2016
    Publication date: February 9, 2017
    Inventors: Efraim Rotem, Nir Rosenzweig, Doron Rajwan, Nadav Shulman, Gal Leibovich, Tomer Ziv, Amit Gabai, Jorge P. Rodriguez, Jeffrey A. Carlson
  • Patent number: 9564804
    Abstract: An electronic device may include a plurality of voltage rails to provide voltages to components of a load, a plurality of voltage regulators, and a buck converter apparatus to separately couple to more than one of the plurality of voltage rails and to provide a voltage to at least a specific one of the voltage rails.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: February 7, 2017
    Assignee: Intel Corporation
    Inventors: Alexander B Uan-Zo-Li, Jorege P Rodriguez, Sofia C Hao, David W Browning, Jeffrey A Carlson, Tawfik M Rahal-Arabi, Jeffrey L Krieger
  • Patent number: 9500714
    Abstract: Examples are disclosed for an integrated circuit (IC) device coupled to a battery-operated power supply unit, such as an IC in a mobile computing device or wireless phone, to accurately determine energy usage drawn from the power supply unit under rapidly dynamic circumstances. A current sense signal of a power line from the power supply unit is digitized. The digitized current sense is added to an accumulator at a rate that is approximately proportional to a voltage of the power line from the power supply unit. The accumulator is then outputted and scaled to units relevant to energy measurements. The energy measurement is used to estimate remaining battery life. Triggering the digitization of the current sense signal may be by use of a pulse generation circuit, or by use of an overflow indicator of an accumulator for a digitized voltage sense signal.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: November 22, 2016
    Assignee: INTEL CORPORATION
    Inventors: Efraim Rotem, Nir Rosenzweig, Jeffrey A. Carlson, Philip R. Lehwalder, Nadav Shulman, Doron Rajwan
  • Patent number: 9477243
    Abstract: A method and apparatus for providing proactive current protection. In one embodiment, the method comprises: prior to transitioning to a new state for an integrated circuit (IC), calculating a sum of expected powers for a plurality of domains in the IC by calculating an expected current for each of the plurality of domains based on an individual domain frequency in the new state and multiplying the expected current with its associated voltage for each of the plurality of domains for the new state; comparing the sum to a power limit; and if the sum is greater than the power limit, then reducing the individual domain frequency associated with at least one domain in the plurality of domains to maintain the total instantaneous power of the IC below the power limit.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: October 25, 2016
    Assignee: Intel Corporation
    Inventors: Efraim Rotem, Nir Rosenzweig, Doron Rajwan, Nadav Shulman, Gal Leibovich, Tomer Ziv, Amit Gabai, Jorge P. Rodriguez, Jeffrey A. Carlson
  • Publication number: 20160291680
    Abstract: An electronic device comprising: a power monitor to receive system power to be delivered to a processor and to one or more components of a system, the power monitor to provide information corresponding to the system power, and a processor to change a performance of the processor based at least in part on the information corresponding to the system power.
    Type: Application
    Filed: December 27, 2013
    Publication date: October 6, 2016
    Inventors: Ruoying Mary MA, James G. HERMERDING II, Efraim ROTEM, Jorge P. RODRIGUEZ, Jeffrey A. CARLSON
  • Publication number: 20160179110
    Abstract: A method and apparatus for providing proactive current protection. In one embodiment, the method comprises: prior to transitioning to a new state for an integrated circuit (IC), calculating a sum of expected powers for a plurality of domains in the IC by calculating an expected current for each of the plurality of domains based on an individual domain frequency in the new state and multiplying the expected current with its associated voltage for each of the plurality of domains for the new state; comparing the sum to a power limit; and if the sum is greater than the power limit, then reducing the individual domain frequency associated with at least one domain in the plurality of domains to maintain the total instantaneous power of the IC below the power limit.
    Type: Application
    Filed: December 22, 2014
    Publication date: June 23, 2016
    Inventors: Efraim Rotem, Nir Rosenzweig, Doron Rajwan, Nadav Shulman, Gal Leibovich, Tomer Ziv, Amit Gabai, Jorge P. Rodriguez, Jeffrey A. Carlson
  • Publication number: 20150001933
    Abstract: An electronic device may include a plurality of voltage rails to provide voltages to components of a load, a plurality of voltage regulators, and a buck converter apparatus to separately couple to more than one of the plurality of voltage rails and to provide a voltage to at least a specific one of the voltage rails.
    Type: Application
    Filed: June 28, 2013
    Publication date: January 1, 2015
    Inventors: Alexander B. UAN-ZO-LI, Jorege P. RODRIGUEZ, Sofia C. HAO, David W. BROWNING, Jeffrey A. CARLSON, Tawfik M. RAHAL-ARABI, Jeffrey L. KRIEGER
  • Patent number: 8148959
    Abstract: An integrated circuit die includes a microprocessor and a control circuit to control elements of a voltage regulator to supply power to the microprocessor.
    Type: Grant
    Filed: February 8, 2011
    Date of Patent: April 3, 2012
    Assignee: Intel Corporation
    Inventors: Jeffrey A. Carlson, Edward P. Osburn
  • Publication number: 20110133824
    Abstract: An integrated circuit die includes a microprocessor and a control circuit to control elements of a voltage regulator to supply power to the microprocessor.
    Type: Application
    Filed: February 8, 2011
    Publication date: June 9, 2011
    Inventors: Jeffrey A. Carlson, Edward P. Osburn
  • Patent number: 7906947
    Abstract: An integrated circuit die includes a microprocessor and a control circuit to control elements of a voltage regulator to supply power to the microprocessor.
    Type: Grant
    Filed: April 9, 2009
    Date of Patent: March 15, 2011
    Assignee: Intel Corporation
    Inventors: Jeffrey A. Carlson, Edward P. Osburn
  • Patent number: 7679344
    Abstract: An integrated circuit die includes a microprocessor and a control circuit to control elements of a voltage regulator to supply power to the microprocessor.
    Type: Grant
    Filed: June 8, 2007
    Date of Patent: March 16, 2010
    Assignee: Intel Corporation
    Inventors: Jeffrey A. Carlson, Edward P. Osburn
  • Publication number: 20090195228
    Abstract: An integrated circuit die includes a microprocessor and a control circuit to control elements of a voltage regulator to supply power to the microprocessor.
    Type: Application
    Filed: April 9, 2009
    Publication date: August 6, 2009
    Inventors: Jeffrey A. Carlson, Edward P. Osburn
  • Patent number: 7242172
    Abstract: An integrated circuit die includes a microprocessor and a control circuit to control elements of a voltage regulator to supply power to the microprocessor.
    Type: Grant
    Filed: March 8, 2004
    Date of Patent: July 10, 2007
    Assignee: Intel Corporation
    Inventors: Jeffrey A. Carlson, Edward P. Osburn
  • Patent number: 7102338
    Abstract: A voltage regulator has an output path to couple to a load. A first sense point at a first sense location on the output path is to sense a first feedback signal for the voltage regulator. And, a second sense point at a second sense location on the output path is to sense a second feedback signal for the voltage regulator.
    Type: Grant
    Filed: October 23, 2003
    Date of Patent: September 5, 2006
    Assignee: Intel Corporation
    Inventors: Edward P. Osburn, Jeffrey A. Carlson
  • Patent number: 6868773
    Abstract: A fluidic actuator includes a central elastic tube with an interior bore and a surrounding sheath formed of braided fibers. End fittings are attached to the tube and sheath at first and second ends thereof and include a cap with a hollow cavity into which an end section of the tube and sheath are inserted and embedded in a hardened adhesive. The hardened adhesive seals off the ends of the tube and strongly bonds the fibers of the sheath to the end caps to provide strong mechanical connections. A fluid coupling may extend through one of the end caps to connection to an end of the tube, with an interior bore in the coupling in communication with the bore in the tube to allow fluid under pressure to be supplied to the interior of the tube. A liquid lubricant may be held in the fibers of the sheath to provide lubrication between the elastic tube and the fibers of the sheath to reduce wear and abrasion of the tube and extend the service life of the actuator.
    Type: Grant
    Filed: August 8, 2003
    Date of Patent: March 22, 2005
    Assignee: Electro Cam Corporation
    Inventors: Donald L. Davis, Jeffrey A. Carlson