Patents by Inventor Jeffrey A. Fischer
Jeffrey A. Fischer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20090125977Abstract: A method and apparatus is disclosed herein for using a language framework for composable programs. In one embodiment, the method comprises accessing active content having a software component embedded therein, where the software component has a plurality of components that together implement a work flow of a sequence of activities, the plurality of components representing one or more external services, one or more user interface controls and one or more inputs and output; executing the software component, including mediating communication between components using an information flow-based security model.Type: ApplicationFiled: October 15, 2008Publication date: May 14, 2009Applicant: DOCOMO Communications Laboratories USA, Inc.Inventors: Ajay Chander, Jeffrey Fischer, Hiroshi Inamura
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Publication number: 20090004752Abstract: A composition and method of detecting counterfeit paper currency includes applying a test solution to a paper currency having ink printed thereon. If the paper currency is counterfeit, the test solution causes the ink to release from the paper currency. If the paper currency is genuine, the ink will not release from the paper currency. The test solution may be an aqueous-alcohol solution having a chemical thickener, and preferably includes a de-foaming agent, a bactericide/fungicide and a fragrance.Type: ApplicationFiled: December 5, 2005Publication date: January 1, 2009Inventors: Ronald J. Kentley, Mark Kentley, Jeffrey Fischer
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Patent number: 7331791Abstract: An IT skills evaluation system and method for evaluating an individual's IT skills. According to one aspect of the invention, the individual is required to perform one or more practical exercises. A practical exercise is an evaluation device for evaluating not only an individual's knowledge, but also the individual's ability to apply their knowledge. One or more virtual machines are associated with each practical exercise, and the test taker must use these virtual machines to complete the exercise. In one aspect, a skills evaluation system according to one embodiment includes a testing computer on which the following software is installed: a virtual machine platform for allowing multiple virtual machines to run simultaneously on the testing computer and a practical skills evaluator for presenting exams to a test taker and scoring the exam. An exam is made up of one or more practical exercise.Type: GrantFiled: March 5, 2002Date of Patent: February 19, 2008Assignee: Novell, Inc.Inventors: David D. Rowley, Thomas K. Christensen, Jeffrey A. Fischer, Craig R. Jenkins, Keith L. Jenkins
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Publication number: 20070250600Abstract: A method for queuing data for an application server is described. The method includes creating a queue entry record corresponding to the data, storing a queue entry including the data and the corresponding queue entry record in a queue, and receiving a command regarding the data from the application server.Type: ApplicationFiled: September 29, 2001Publication date: October 25, 2007Inventors: Agnes Freese, Jeffrey Fischer, Peter Lim
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Publication number: 20070229134Abstract: A multimode, uniform-latency clock generation circuit (CGC) is described herein. In one example, the multimode, uniform-latency CGC generates a pulse clock signal via a clock generation path responsive to a clock chopping signal being active and generates a phase clock signal via the same clock generation path responsive to the clock chopping signal being inactive. The clock chopping signal is activated responsive to a mode control input signal being in a first state and deactivated responsive to either the mode control input signal being in a second state or a plurality of clock enable signals being inactive. In one or more embodiments, a multimode, uniform-latency CGC is included in a microprocessor for providing pulse clock signals to inter-stage pulsed sequential storage elements when operating in a timing sensitive mode and for providing phase clock signals to the inter-stage pulsed sequential storage elements when operating in a timing insensitive mode.Type: ApplicationFiled: March 31, 2006Publication date: October 4, 2007Inventors: Fadi Hamdan, Jeffrey Fischer, William Goodall
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Publication number: 20070226730Abstract: Techniques to track and publish changes to object instances. For an “outbound process” to publish object instances, a list of object instances is initially received. For each received object instance, a determination is made whether or not the object instance has changed since its last publication. For each changed object instance, a delta snapshot is generated and includes data indicative of changes between the current and last published versions of the object instance. Delta snapshots for all changed object instances are then published. For an “inbound process” to receive object instances, the published delta snapshots are initially received. For each received delta snapshot, the corresponding object instance is retrieved and updated with the changes included in the delta snapshot. A new snapshot is also generated for each updated object instance such that the received changes are not published, and unpublished changes made locally are noted for subsequent publication.Type: ApplicationFiled: November 18, 2002Publication date: September 27, 2007Applicant: Siebel Systems, Inc.Inventors: Mark Coyle, Jeffrey Fischer, Min Lu, Shuang Huang, Alexander Warshavsky
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Publication number: 20070210833Abstract: A multi-enabled clock gating circuit reduces clock enable setup time. In one example, the multi-enabled clock gating circuit comprises an OAI logic gate and a clock enable control circuit. The OAI logic gate is configured to generate a gated clock signal by inverting an input clock signal responsive to one of a timing-sensitive clock enable signal and a timing-insensitive clock enable signal being active. The clock enable control circuit is configured to prevent the OAI logic gate from receiving the timing-insensitive clock enable signal responsive to the timing-sensitive clock enable signal being active. In one or more embodiments, a multi-enabled clock gating circuit having reduced clock enable setup time may be included in an integrated circuit for implementing clock gating during different operating modes of the integrated circuit.Type: ApplicationFiled: March 9, 2006Publication date: September 13, 2007Inventors: Fadi Hamdan, Jeffrey Fischer, William Goodall
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Publication number: 20070198539Abstract: A method to convert data between a relational format and an XML document, by creating a set of XML Mapping Definition from metadata; selecting relational data from a relational application database, and converting the relational data to the XML document using the set of XML Mapping Definition.Type: ApplicationFiled: April 26, 2004Publication date: August 23, 2007Inventors: Alex Warshavsky, Chandrakant Bhavsar, Jeffrey Fischer
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Publication number: 20070113158Abstract: The search key and key fields of a CAM in a cache are encoded with a Hamming distance of at least two to increase the speed of the CAM by ensuring each mismatching match line is discharged by at least two transistors in parallel. Where the cache is physically tagged, the search key is a physical address. The page address portion of the physical address is encoded prior to being stored in a TLB. The page offset bits are encoded in parallel with the TLB access, and concatenated with the encoded TLB entry. If a page address addresses a large memory page size, a plurality of corresponding sub-page addresses may be generated, each addressing a smaller page size. These sub-page addresses may be encoded and stored in a micro TLB. The encoded key and key field are tolerant of single-bit soft errors.Type: ApplicationFiled: October 28, 2005Publication date: May 17, 2007Inventors: Jeffrey Fischer, Michael Phan, Chiaming Chai, James Dieffenderfer
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Publication number: 20070097722Abstract: A CAM bank is functionally divided into two or more sub-banks, without replication CAM driver circuits, by disabling all match line discharge circuits in the bank, and selectively enabling the discharge circuits in comprising sub-banks. At least one selectively actuated switching circuit is interposed between the virtual ground node of each discharging comparator in the discharge circuit of a sub-bank and circuit ground. When the switching circuit is in a non-conductive state, the virtual ground node is maintained at a voltage level sufficiently above circuit ground to preclude discharging a connected match line within the CAM access time. When the switching circuit is placed in a conductive state, the virtual ground node is pulled to circuit ground and the connected match line may be discharged by a miscompare. Control signals, which may be decode from address bits, are distributed to the switching circuits to defined the CAM sub-banks.Type: ApplicationFiled: October 28, 2005Publication date: May 3, 2007Inventors: Michael Phan, Chiaming Chai, Jeffrey Bridges, Jeffrey Fischer
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Publication number: 20070099623Abstract: A system and method that facilitates the configuration and control of components of an RFID system, taking into account how the RFID system components are associated with one or more physical locations within an environment in which the RFID system is deployed. A user provides information specifying associations between the system components and the physical locations within the environment to obtain visual representations of configuration data generated therefrom with reference to a facility view, an RF coverage view, and a location view of the data. The facility view serves as a reference plane for placement and orientation of antennas associated with RFID readers, location benchmark tags, and the physical locations of interest. After each antenna is placed and oriented on the facility view, an estimate of the size and shape of the RF interrogation zone of each antenna is computed, and representations of the RF interrogation zones are provided on the facility view to obtain the RF coverage view of the data.Type: ApplicationFiled: October 16, 2006Publication date: May 3, 2007Inventors: Robert Stephensen, Michael Grady, Scott Barvick, David Husak, Lin Zhou, Nirav Shah, Pattabhiraman Krishna, Jeffrey Fischer, Chilton Cabot
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Publication number: 20070043992Abstract: A pattern implementation technique in which a pattern is defined as a software artifact that comprises a pattern signature representing one or more parameters of the pattern and a pattern implementation model representing one or more methods for expanding the pattern in a selected software context by assigning one or more arguments to the one or more parameters. The pattern implementation model can be based on one or more framework code sets, each of which supports the creation of plural patterns by providing a pattern implementation model for a particular software context. The framework code sets can be rendered extensible by a pattern author by virtue of providing methods whose code is adapted to be modified by a pattern author when defining a pattern. The pattern can be applied by creating an instance of the pattern in a software context and presenting a graphical representation of the pattern instance that can be manipulated by the pattern user in order to apply arguments to the pattern parameters.Type: ApplicationFiled: August 4, 2005Publication date: February 22, 2007Inventors: David Stevenson, James Abbott, Jeffrey Fischer, Scott Schneider, Brian Roberts, Martha Andrews, David Ruest, Shawn Gardner, Christopher Maguire, Eric Funk
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Publication number: 20070011653Abstract: A method and system for exposing a version-independent interface to a computer resource. The interface system exposes a version-independent interface to a computer resource, such as a database or computer program. The interface system also provides a version-dependent interface to the computer resource that is typically not exposed. When the computer resource is modified, the version-dependent interface may be modified, but the version-independent interface might not be modified. When the version-dependent interface is modified, a mapping is generated (in some cases automatically) between the version-independent interface and the version-dependent interface. When an accessing computer program uses the version-independent interface to request services of the computer resource, the system uses the mapping to map the request to a request that is appropriate for the version-dependent interface.Type: ApplicationFiled: September 12, 2006Publication date: January 11, 2007Inventors: Jeffrey Fischer, Heung-Wah Yan
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Publication number: 20060280003Abstract: Techniques for reducing power when reading a full-swing memory array are disclosed. The full-swing memory array includes a plurality of local bit lines and a global bit line. In order to reduce power consumption, a method of driving the global bit line includes the step of coupling the plurality of local bit lines to the global bit line through a plurality of tri-state devices. The method further includes the steps of generating a global select signal to enable one of the plurality of tri-state devices and selecting a corresponding local bit line to drive the output of the enabled tri-state device. In this way, the global bit line is statically driven so that consecutive reads of bits having the same value read over the global bit line do not result in transitioning the state of the global bit line.Type: ApplicationFiled: June 14, 2005Publication date: December 14, 2006Inventors: Yeshwant Kolla, Gregory Burda, Jeffrey Fischer
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Patent number: 7107594Abstract: A method and system for exposing a version-independent interface to a computer resource. The interface system exposes a version-independent interface to a computer resource, such as a database or computer program. The interface system also provides a version-dependent interface to the computer resource that is typically not exposed. When the computer resource is modified, the version-dependent interface may be modified, but the version-independent interface might not be modified. When the version-dependent interface is modified, a mapping is generated (in some cases automatically) between the version-independent interface and the version-dependent interface. When an accessing computer program uses the version-independent interface to request services of the computer resource, the system uses the mapping to map the request to a request that is appropriate for the version-dependent interface.Type: GrantFiled: September 18, 2002Date of Patent: September 12, 2006Assignee: Siebel Systems, Inc.Inventors: Jeffrey Fischer, Heung-Wah Yan
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Publication number: 20060170565Abstract: A system and method of determining locations of one or more RFID tags within an RFID environment. The system includes a plurality of RFID readers, each operative to transmit and receive RF signals for scanning a tag disposed within an RF coverage region associated with the reader, and for receiving tag data in response to the scanning of the tag. A plurality of sub-locations is determined within the environment, each corresponding to at least a portion of at least one of a plurality of RF coverage regions associated with the readers. The sub-locations are mapped to a plurality of predefined locations within the environment. A reader scans a tag, and receives tag scan data from the tag in response to the scanning of the tag. The tag scan data includes a tag identifier associated with the scanned tag. The tag scan data is mapped to the sub-locations based on the RF coverage region associated with the reader.Type: ApplicationFiled: July 29, 2005Publication date: August 3, 2006Inventors: David Husak, Pattabhiraman Krishna, Peter Spreadborough, Jeffrey Fischer
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Publication number: 20060022801Abstract: An architecture of an RFID system that facilitates the accessing of RFID tag data within an RFID environment. The architecture includes a plurality of RFID readers, each reader being operative to transmit a first RF signal for scanning at least one RFID tag disposed within an RF coverage region associated with the reader, and to receive at least one second RF signal including tag data in response to the scanning of the tag. The architecture further includes at least one host computer operative to execute at least one client application, and at least one controller/processor communicably coupled to the plurality of readers and the at least one host computer. The controller/processor is operative to control operation of the plurality of readers, to process the tag data received by the plurality of readers, and to provide the processed tag data to the at least one host computer for use by the at least one client application executing thereon.Type: ApplicationFiled: July 29, 2005Publication date: February 2, 2006Inventors: David Husak, Robert Stephenson, Michael Grady, Scott Barvick, Pattabhiraman Krishna, Chilton Cabot, Jeffrey Fischer
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Publication number: 20060022800Abstract: A system and method of scheduling RFID tag interrogations by a plurality of RFID readers so as to mitigate the effects of interference within an RFID environment in which the readers are deployed, and to enhance the efficiency and reliability of the overall RFID system. The system includes a plurality of RFID receivers for receiving RFID tag data, a plurality of RFID tag interrogators for transmitting RF interrogation signals for interrogating RFID tags, and a controller for providing to at least one interrogator, at least one receiver, and at least one tag, a parameter associated with operational characteristics of the interrogator, the receiver, and the tag, respectively. The interrogator, the receiver, and the tag are operative, in response to receipt of the respective parameter, to modify its operational characteristics in accordance with the respective parameter, thereby avoiding interference at the receivers and the tags.Type: ApplicationFiled: July 29, 2005Publication date: February 2, 2006Inventors: Pattabhiraman Krishna, Jeffrey Fischer, David Husak, Robert Stephenson
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Publication number: 20060022815Abstract: A system and method for monitoring and characterizing various sources of RF interference within an RFID environment, and for adjusting the operational characteristics of an array of RFID readers within the system based on these interference characterizations. The system examines the received transmissions from readers in the network by controlling a calibration cycle or while they are operating as interrogators to determine interference parameters, and to verify the operation of the readers in the array. The system also examines outside sources of interference, and signal dependent interference. The interference characterization can also be estimated from a combination of calculations and co-monitoring.Type: ApplicationFiled: July 29, 2005Publication date: February 2, 2006Inventors: Jeffrey Fischer, David Husak, Pattabhiraman Krishna
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Patent number: 6941360Abstract: A mechanism and system are provided for making available information that identifies participants of a distributed operation by registering the information with a name service. Once the participant information has been registered with the name service, the name service supplies the information to entities that request it. An example of a distributed operation is a distributed transaction executed by two or more database servers.Type: GrantFiled: February 25, 1999Date of Patent: September 6, 2005Assignee: Oracle International CorporationInventors: Alok Kumar Srivastava, Jeffrey Fischer, Karl Dias