Patents by Inventor Jeffrey A. Roy

Jeffrey A. Roy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5938771
    Abstract: A network interface for a workstation having multiple power supply domains includes a wake up module for detecting a wake up request in a received data packet according to the on-now power management scheme and Magic Packet.TM. power management schemes. An EEPROM supplies an override bit to ensure that the on-now power management schemes and Magic Packet.TM. power up management schemes can have co-existent detection mechanisms, independent of whether a required enable bit is set by the operating system. The disclosed arrangement maintains the power management schemes in the event that a power loss disables the enabled bit normally supplied by the host computer operating system.
    Type: Grant
    Filed: October 30, 1997
    Date of Patent: August 17, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Robert Alan Williams, Jeffrey Roy Dwork
  • Patent number: 5938728
    Abstract: A network interface for a workstation, configured to be powered down to a standby mode while the network interface remains in a powered-up condition, includes a bypass circuit configured to enable configuration registers in the network interface to complete loading of configuration information in a known state, regardless of an absence of an external data clock from the network during the initialization interval. The bypass circuit ensures that the configuration registers in the network interface that require a network clock (e.g., a transmit clock or a receive clock) are maintained in a known state to enable the network interface to be independently initialized. One example of the bypass circuit holds a power on reset signal until the necessary network clock signal is detected for a predetermined number of detected clock cycles.
    Type: Grant
    Filed: October 30, 1997
    Date of Patent: August 17, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Jeffrey Roy Dwork, Ching Yu, Robert Alan Williams, Rajat Roy
  • Patent number: 5933413
    Abstract: A network interface stores data frames between a host computer and a network in a buffer memory. The network interface stores data frames received from the host computer via a peripheral component interconnect (PCI) bus in a transmit buffer for transmission on the network. The network interface also stores data from the network in a receive buffer for transfer to a host computer memory via the PCI bus. A priority control selectively allocates host computer resources based on network transmission and network reception by the network interface, and based on available space in the receive buffer, available data in the transmit buffer, and the estimated length of data packets received from the network. The selective allocation of host computer resources minimizes transmit buffer underflow and receive buffer overflow.
    Type: Grant
    Filed: January 13, 1997
    Date of Patent: August 3, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Shashank C. Merchant, Jeffrey Roy Dwork