Patents by Inventor Jeffrey Alexander Levin

Jeffrey Alexander Levin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10339041
    Abstract: Aspects of the present disclosure provide methods and apparatus for allocating memory in an artificial nervous system simulator implemented in hardware. According to certain aspects, memory resource requirements for one or more components of an artificial nervous system being simulated may be determined and portions of a shared memory pool (which may include on-chip and/or off-chip RAM) may be allocated to the components based on the determination.
    Type: Grant
    Filed: August 5, 2014
    Date of Patent: July 2, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Venkat Rangan, Jan Krzys Wegrzyn, Jeffrey Alexander Levin, John Paul Daniels
  • Patent number: 9959499
    Abstract: Certain aspects of the present disclosure support assigning neurons and/or synapses to group tags where group tags have an associated set of parameters. By using group tags, neurons or synapses in a population can be assigned a group tag. Then, by changing a parameter associated with the group tag, all synapses or neurons in the group may have that parameter changed.
    Type: Grant
    Filed: May 2, 2014
    Date of Patent: May 1, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: David Jonathan Julian, Jeffrey Alexander Levin, Jeffrey Baginsky Gehlhaar
  • Patent number: 9672464
    Abstract: Certain aspects of the present disclosure support efficient implementation of common neuron models. In an aspect, a first memory layout can be allocated for parameters and state variables of instances of a first neuron model, and a second memory layout different from the first memory layout can be allocated for parameters and state variables of instances of a second neuron model having a different complexity than the first neuron model.
    Type: Grant
    Filed: May 1, 2014
    Date of Patent: June 6, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Anthony Sarah, Jeffrey Alexander Levin, Jeffrey Baginsky Gehlhaar
  • Patent number: 9652713
    Abstract: Apparatus and methods for developing parallel networks. Parallel network design may comprise a general purpose language (GPC) code portion and a network description (ND) portion. GPL tools may be utilized in designing the network. The GPL tools may be configured to produce network specification language (NSL) engine adapted to generate hardware optimized machine executable code corresponding to the network description. The developer may be enabled to describe a parameter of the network. The GPC portion may be automatically updated consistent with the network parameter value. The GPC byte code may be introspected by the NSL engine to provide the underlying source code that may be automatically reinterpreted to produce the hardware optimized machine code. The optimized machine code may be executed in parallel.
    Type: Grant
    Filed: April 4, 2016
    Date of Patent: May 16, 2017
    Assignee: QUALCOMM Technologies, Inc.
    Inventors: Jonathan James Hunt, Oleg Sinyavskiy, Robert Howard Kimball, Eric Martin Hall, Jeffrey Alexander Levin, Paul Bender, Michael-David Nakayoshi Canoy
  • Patent number: 9600762
    Abstract: A method for dynamically setting a neuron value processes a data structure including a set of parameters for a neuron model and determines a number of segments defined in the set of parameters. The method also includes determining a number of neuron types defined in the set of parameters and determining at least one boundary for a first segment.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: March 21, 2017
    Assignee: QUALCOMM INCORPORATED
    Inventors: Anthony Sarah, Jeffrey Alexander Levin
  • Patent number: 9542643
    Abstract: Certain aspects of the present disclosure support operating simultaneously multiple super neuron processing units in an artificial nervous system, wherein a plurality of artificial neurons is assigned to each super neuron processing unit. The super neuron processing units can be interfaced with a memory for storing and loading synaptic weights and plasticity parameters of the artificial nervous system, wherein organization of the memory allows contiguous memory access.
    Type: Grant
    Filed: May 1, 2014
    Date of Patent: January 10, 2017
    Assignee: QUALCOMM INCORPORATED
    Inventors: Jeffrey Alexander Levin, Venkat Rangan, Erik Christopher Malone
  • Patent number: 9542645
    Abstract: A method for managing synapse plasticity in a neural network includes converting a first set of synapses from a plastic synapse type to a fixed synapse type. The method may also include converting a second set of synapses from the fixed synapse type to the plastic synapse type.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: January 10, 2017
    Assignee: QUALCOMM INCORPORATED
    Inventors: Vikram Gupta, Sarah Paige Gibson, Jeffrey Alexander Levin, Ravindra Manohar Patwardhan, Avijit Chakraborty, William Howard Constable, William Richard Bell, II
  • Patent number: 9460385
    Abstract: Apparatus and methods for activity based plasticity in a spiking neuron network adapted to process sensory input. In one approach, the plasticity mechanism of a connection may comprise a causal potentiation portion and an anti-causal portion. The anti-causal portion, corresponding to the input into a neuron occurring after the neuron response, may be configured based on the prior activity of the neuron. When the neuron is in low activity state, the connection, when active, may be potentiated by a base amount. When the neuron activity increases due to another input, the efficacy of the connection, if active, may be reduced proportionally to the neuron activity. Such functionality may enable the network to maintain strong, albeit inactive, connections available for use for extended intervals.
    Type: Grant
    Filed: August 22, 2014
    Date of Patent: October 4, 2016
    Assignee: QUALCOMM TECHNOLOGIES INC.
    Inventors: Filip Piekniewski, Micah Richert, Eugene Izhikevich, Victor Hokkiu Chan, Jeffrey Alexander Levin
  • Patent number: 9460384
    Abstract: Methods and apparatus are provided for effecting modulation using global scalar values in a spiking neural network. One example method for operating an artificial nervous system generally includes determining one or more updated values for artificial neuromodulators to be used by a plurality of entities in a neuron model and providing the updated values to the plurality of entities.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: October 4, 2016
    Assignee: QUALCOMM INCORPORATED
    Inventors: Jeffrey Alexander Levin, Yinyin Liu, Sarah Paige Gibson, Michael Campos, Vikram Gupta, Victor Hokkiu Chan, Edward Hanyu Liao, Erik Christopher Malone
  • Patent number: 9436908
    Abstract: Apparatus and methods for activity based plasticity in a spiking neuron network adapted to process sensory input. In one approach, the plasticity mechanism of a connection may comprise a causal potentiation portion and an anti-causal portion. The anti-causal portion, corresponding to the input into a neuron occurring after the neuron response, may be configured based on the prior activity of the neuron. When the neuron is in low activity state, the connection, when active, may be potentiated by a base amount. When the neuron activity increases due to another input, the efficacy of the connection, if active, may be reduced proportionally to the neuron activity. Such functionality may enable the network to maintain strong, albeit inactive, connections available for use for extended intervals.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: September 6, 2016
    Assignee: QUALCOMM TECHNOLOGIES INC.
    Inventors: Filip Piekniewski, Micah Richert, Eugene Izhikevich, Victor Hokkiu Chan, Jeffrey Alexander Levin
  • Patent number: 9418332
    Abstract: Methods and apparatus are provided for inferring and accounting for missing post-synaptic events (e.g., a post-synaptic spike that is not associated with any pre-synaptic spikes) at an artificial neuron and adjusting spike-timing dependent plasticity (STDP) accordingly. One example method generally includes receiving, at an artificial neuron, a plurality of pre-synaptic spikes associated with a synapse, tracking a plurality of post-synaptic spikes output by the artificial neuron, and determining at least one of the post-synaptic spikes is associated with none of the plurality of pre-synaptic spikes. According to certain aspects, determining inferring missing post-synaptic events may be accomplished by using a flag, counter, or other variable that is updated on post-synaptic firings. If this post-ghost variable changes between pre-synaptic-triggered adjustments, then the artificial nervous system can determine there was a missing post-synaptic pairing.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: August 16, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Jason Frank Hunzinger, Jeffrey Alexander Levin
  • Publication number: 20160217370
    Abstract: Apparatus and methods for developing parallel networks. Parallel network design may comprise a general purpose language (GPC) code portion and a network description (ND) portion. GPL tools may be utilized in designing the network. The GPL tools may be configured to produce network specification language (NSL) engine adapted to generate hardware optimized machine executable code corresponding to the network description. The developer may be enabled to describe a parameter of the network. The GPC portion may be automatically updated consistent with the network parameter value. The GPC byte code may be introspected by the NSL engine to provide the underlying source code that may be automatically reinterpreted to produce the hardware optimized machine code. The optimized machine code may be executed in parallel.
    Type: Application
    Filed: April 4, 2016
    Publication date: July 28, 2016
    Inventors: Jonathan James HUNT, Oleg SINYAVSKIY, Robert Howard KIMBALL, Eric Martin HALL, Jeffrey Alexander LEVIN, Paul BENDER, Michael-David Nakayoshi CANOY
  • Patent number: 9299022
    Abstract: Apparatus and methods for an extensible robotic device with artificial intelligence and receptive to training controls. In one implementation, a modular robotic system that allows a user to fully select the architecture and capability set of their robotic device is disclosed. The user may add/remove modules as their respective functions are required/obviated. In addition, the artificial intelligence is based on a neuronal network (e.g., spiking neural network), and a behavioral control structure that allows a user to train a robotic device in manner conceptually similar to the mode in which one goes about training a domesticated animal such as a dog or cat (e.g., a positive/negative feedback training paradigm) is used. The trainable behavior control structure is based on the artificial neural network, which simulates the neural/synaptic activity of the brain of a living organism.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: March 29, 2016
    Assignee: QUALCOMM TECHNOLOGIES INC.
    Inventors: Marius Buibas, Charles Wheeler Sweet, III, Mark S. Caskey, Jeffrey Alexander Levin
  • Patent number: 9256823
    Abstract: Efficient updates of connections in artificial neuron networks may be implemented. A framework may be used to describe the connections using a linear synaptic dynamic process, characterized by stable equilibrium. The state of neurons and synapses within the network may be updated, based on inputs and outputs to/from neurons. In some implementations, the updates may be implemented at regular time intervals. In one or more implementations, the updates may be implemented on-demand, based on the network activity (e.g., neuron output and/or input) so as to further reduce computational load associated with the synaptic updates. The connection updates may be decomposed into multiple event-dependent connection change components that may be used to describe connection plasticity change due to neuron input. Using event-dependent connection change components, connection updates may be executed on per neuron basis, as opposed to per-connection basis.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: February 9, 2016
    Assignee: QUALCOMM TECHNOLOGIES INC.
    Inventors: Oleg Sinyavskiy, Vadim Polonichko, Eugene Izhikevich, Jeffrey Alexander Levin
  • Publication number: 20150324687
    Abstract: Apparatus and methods for an extensible robotic device with artificial intelligence and receptive to training controls. In one implementation, a modular robotic system that allows a user to fully select the architecture and capability set of their robotic device is disclosed. The user may add/remove modules as their respective functions are required/obviated. In addition, the artificial intelligence is based on a neuronal network (e.g., spiking neural network), and a behavioral control structure that allows a user to train a robotic device in manner conceptually similar to the mode in which one goes about training a domesticated animal such as a dog or cat (e.g., a positive/negative feedback training paradigm) is used. The trainable behavior control structure is based on the artificial neural network, which simulates the neural/synaptic activity of the brain of a living organism.
    Type: Application
    Filed: August 26, 2014
    Publication date: November 12, 2015
    Inventors: Marius Buibas, Charles Wheeler SWEET III, Mark S. CASKEY, Jeffrey Alexander LEVIN
  • Patent number: 9177245
    Abstract: Apparatus and methods for learning in response to temporally-proximate features. In one implementation, an image processing apparatus utilizes bi-modal spike timing dependent plasticity in a spiking neuron network. Based on a response by the neuron to a frame of input, the bi-modal plasticity mechanism is used to depress synaptic connections delivering the present input frame and to potentiate synaptic connections delivering previous and/or subsequent frames of input. The depression of near-contemporaneous input prevents the creation of a positive feedback loop and provides a mechanism for network response normalization.
    Type: Grant
    Filed: February 8, 2013
    Date of Patent: November 3, 2015
    Assignee: QUALCOMM TECHNOLOGIES INC.
    Inventors: Micah Richert, Filip Piekniewski, Eugene Izhikevich, Sach Sokol, Victor Hokkiu Chan, Jeffrey Alexander Levin
  • Patent number: 9177246
    Abstract: Apparatus and methods for an extensible robotic device with artificial intelligence and receptive to training controls. In one implementation, a modular robotic system that allows a user to fully select the architecture and capability set of their robotic device is disclosed. The user may add/remove modules as their respective functions are required/obviated. In addition, the artificial intelligence is based on a neuronal network (e.g., spiking neural network), and a behavioral control structure that allows a user to train a robotic device in manner conceptually similar to the mode in which one goes about training a domesticated animal such as a dog or cat (e.g., a positive/negative feedback training paradigm) is used. The trainable behavior control structure is based on the artificial neural network, which simulates the neural/synaptic activity of the brain of a living organism.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: November 3, 2015
    Assignee: QUALCOMM TECHNOLOGIES INC.
    Inventors: Marius Buibas, Charles Wheeler Sweet, III, Mark S. Caskey, Jeffrey Alexander Levin
  • Patent number: 9165245
    Abstract: Apparatus and methods for partial evaluation of synaptic updates in neural networks. In one embodiment, a pre-synaptic unit is connected to a several post synaptic units via communication channels. Information related to a plurality of post-synaptic pulses generated by the post-synaptic units is stored by the network in response to a system event. Synaptic channel updates are performed by the network using the time intervals between a pre-synaptic pulse, which is being generated prior to the system event, and at least a portion of the plurality of the post synaptic pulses. The system event enables removal of the information related to the portion of the post-synaptic pulses from the storage device. A shared memory block within the storage device is used to store data related to post-synaptic pulses generated by different post-synaptic nodes. This configuration enables memory use optimization of post-synaptic units with different firing rates.
    Type: Grant
    Filed: May 12, 2014
    Date of Patent: October 20, 2015
    Assignee: QUALCOMM TECHNOLOGIES INC.
    Inventors: Eugene M. Izhikevich, Filip Piekniewski, Jayram Moorkanikara Nageswaran, Jeffrey Alexander Levin, Venkat Rangan, Erik Christopher Malone
  • Publication number: 20150286925
    Abstract: A method for maintaining a state variable in a synapse of a neural network includes maintaining a state variable in an axon. The state variable in the axon may be updated based on an occurrence of a first predetermined event. The method also includes updating the state variable in the synapse based on the state variable in the axon and an occurrence of a second predetermined event.
    Type: Application
    Filed: April 8, 2014
    Publication date: October 8, 2015
    Applicant: QUALCOMM Incorporated
    Inventors: Jeffrey Alexander LEVIN, Yinyin LIU, Sandeep PENDYAM, Michael CAMPOS
  • Publication number: 20150278684
    Abstract: Certain aspects of the present disclosure support techniques for time synchronization of spiking neuron models that utilize multiple nodes. According to certain aspects, a neural model (e.g., of an artificial nervous system) may be implemented using a plurality of processing nodes, each processing node implementing a neuron model and communicating via the exchange of spike packets carrying information regarding spike information for artificial neurons. A mechanism may be provided for maintaining relative spike-timing between the processing nodes. In some cases, a mechanism may also be provided to alleviate deadlock conditions between the multiple nodes.
    Type: Application
    Filed: May 21, 2014
    Publication date: October 1, 2015
    Applicant: QUALCOMM Incorporated
    Inventors: Ravindra Manohar PATWARDHAN, Jeffrey Alexander LEVIN, Rotem COOPER, Brian SPINAR, Michael Colin TREMAINE