Patents by Inventor Jeffrey B. Chritz

Jeffrey B. Chritz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Input buffer regenerative latch for ECL levels
    Patent number: 5103121
    Abstract: An imput buffer regenerative latch circuit useful in BiCMOS integrated circuits is presented. The ECL input signal terminal is connected to the base of a bipolar transistor. The emitter of the transistor is connected to one of two input/out nodes of a CMOS regenerative latch circuit by the source/drain path of a MOS transistor. The second input/output node is similar connected to the emitter of a second bipolar transistor by the source/drain path of a second MOS transistor. The base of the second bipolar transistor is held at a reference voltage midway in the ECL voltage range. Latching occurs very quickly when the CMOS latch is activated.
    Type: Grant
    Filed: April 2, 1990
    Date of Patent: April 7, 1992
    Assignee: National Semiconductor Corporation
    Inventors: Dennis L. Wendell, James E. Demaris, Jeffrey B. Chritz