Abstract: A circuit and method for powering DC devices using DC voltage sources. The present invention provides an improved switching power supply that has reduced switching losses and prevents current backflow under light load conditions. The circuit operates using pulse-frequency modulation in discontinuous conduction mode for powering small loads. A rectifier circuit prevents current backflows into the DC voltage source to prevent overheating and device failure.

Abstract: A circuit and method for powering DC devices using DC voltage sources. The present invention provides an improved switching power supply that has reduced switching losses and prevents current backflow under light load conditions. The circuit operates using pulse-frequency modulation in discontinuous conduction mode for powering small loads. A rectifier circuit prevents current backflows into the DC voltage source to prevent overheating and device failure.

Abstract: A method and circuit for error current compensation is presented. The method includes the steps of generating a first current and an associated error current, generating a second current and an associated error current substantially equal to the first current and the first error current, respectively, and generating a third current substantially equal to the first current. The method includes the additional steps of extracting the second error current from the second current, generating a multiplied current equal to the scaled error current plus a multiplier error current, and combining the multiplied current with the first current and first error current.The circuit for error current compensation includes a first, second and third current source, a multiplier, and a first and second subtractor.

Abstract: Control circuit for providing the greater of a supply voltage V.sub.CC and a battery voltage V.sub.BATT. A comparator compares V.sub.CC and V.sub.BATT, and provides output signals to an inverting gain stage. A switch receives output signals from the inverting gain stage and provides the greater of V.sub.CC and V.sub.BATT as the circuit output and as the comparator supply voltage. The circuit output voltage rapidly switches between V.sub.CC and V.sub.BATT as the comparison status of the two voltages changes.

Abstract: A power sensor circuit including an input terminal, a switch, a nonlinear voltage drop element, and a switching unit, wherein the switching unit provides an output voltage. In response to a voltage difference between a first reference voltage and a second reference voltage, the power sensor circuit outputs a voltage that varies between two states. In one embodiment, the first state is substantially equal to the second reference voltage and the second state is substantially equal to ground. In another embodiment, the power sensor circuit is composed of four metal oxide semiconductor field effect transistors (MOSFETs) that compare a first reference voltage with a second reference voltage and determine whether the second reference voltage exceeds the first reference voltage by a predetermined voltage. If so, then the second reference voltage is produced at the output terminal of the power sensor circuit.

Abstract: A full differential sample and hold circuit for an analog to digital converter. The sample and hold circuit samples and holds the differential signal resulting from two input signals. The sample and hold circuit includes a comparator, two differential capacitors and a common mode sample and hold circuit. The comparator has two input terminals and an output terminal. Each of the differential capacitors corresponds to one of the input signals and has an input terminal adapted for selective coupling to the respective input signal. Each of the differential capacitors has an output terminal electrically coupled to a different input terminal of the comparator. The common mode sample and hold circuit is disposed between the input terminals of the two differential capacitors. In one embodiment, the common mode sample and hold circuit comprises two common mode capacitors.

Abstract: A read-only memory cell capable of being programmed by the application of radiant energy. The memory cell includes a trimmable resistor, a diode and a latch. In one embodiment, the cathode of the diode is in electrical communication with a first terminal of the resistor and the anode of the diode is in electrical communication with the second terminal of the resistor. The latch has an input terminal in electrical communication with the second terminal of the resistor and an output terminal. The latch is in a first state when the trimmable resistor is untrimmed and is in a second state when the trimmable resistor is trimmed. In one embodiment, the trimmable resistor is trimmable by laser energy. The invention also relates to a method of storing data in a memory cell.

Abstract: A multiple channel analog to digital converter utilizing common conversion circuitry for converting multiple analog signals into corresponding digital signals. The converter includes an input stage having a plurality of capacitors, each one corresponding to one of the analog signals. The capacitors sample the respective analog signals and are successively coupled to common conversion circuitry, including a CDAC and a comparator. The CDAC iteratively increments or decrements the voltage of a selected one of the sampled analog signals for comparison to a reference voltage by the comparator. The comparator output is latched by a successive approximation register to provide a parallel output signal which is fed back to control the CDAC.