Patents by Inventor Jeffrey C. Weaver

Jeffrey C. Weaver has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5935268
    Abstract: A method and apparatus for generating an error detection code, such as a Cyclic Redundancy Checksum (CRC), for a modified binary data block. The modified data block, such as a VLAN frame, is derived from an original binary data block, such as an ethernet frame, having a first error detection code associated therewith. In one embodiment, the method requires modifying the original data block utilizing first data, in the form of VLAN header information, to generate the VLAN frame, whereafter a second error detection code is calculated exclusively for the VLAN header information. More specifically, where the original data block is modified by the insertion of the VLAN header information into the original data block, a CRC is calculated using the VLAN header information shifted to a position corresponding to its position within the modified data block.
    Type: Grant
    Filed: June 3, 1997
    Date of Patent: August 10, 1999
    Assignee: Bay Networks, Inc.
    Inventor: Jeffrey C. Weaver