Abstract: A vapor phase deposition method and apparatus for the application of thin layers and coatings on substrates. The method and apparatus are useful in the fabrication of electronic devices, micro-electromechanical systems (MEMS), Bio-MEMS devices, micro and nano imprinting lithography, and microfluidic devices. The apparatus used to carry out the method provides for the addition of a precise amount of each of the reactants to be consumed in a single reaction step of the coating formation process. The apparatus provides for precise addition of quantities of different combinations of reactants during a single step or when there are a number of different individual steps in the coating formation process. The precise addition of each of the reactants in vapor form is metered into a predetermined set volume at a specified temperature to a specified pressure, to provide a highly accurate amount of reactant.

Abstract: A substrate processing apparatus comprises a chamber 28 capable of processing a substrate 20. A radiation source 58 provides radiation that is at least partially reflected from the substrate in the chamber. A radiation detector 62 is provided to detect the reflected radiation and generate a signal. A controller 100 is adapted to receive the signal and determine a property of the substrate 20 in situ during processing, before an onset of during or after processing of a material on the substrate 20.

Abstract: A method of etching a silicon-containing material in a substrate comprises placing the substrate in a process chamber and exposing the substrate to an energized gas comprising fluorine-containing gas, chlorine-containing gas and sidewall-passivation gas. The silicon-containing material on the substrate comprises regions having different compositions, and the volumetric flow ratio of the fluorine-containing gas, chlorine-containing gas, and sidewall-passivation gas is selected to etch the compositionally different regions at substantially similar etch rates.

Abstract: A process for etching a substrate 25 in an etching chamber 30, and simultaneously cleaning a thin, non-homogeneous, etch residue deposited on the surfaces of the walls 45 and components of the etching chamber 30. In the etching step, process gas comprising etchant gas is used to etch a substrate 25 in the etching chamber 30 thereby depositing etch residue inside the chamber 30. Cleaning gas is added to the process gas for a sufficient time and in a volumetric flow ratio that is sufficiently high, to react with and remove substantially all the etch residue deposited by the process gas. The present method advantageously cleans the etch residue in the chamber 30, during the etching process, and without use of separate cleaning, conditioning, and seasoning process steps.

Abstract: A process of reducing critical dimension (CD) microloading in dense and isolated regions of etched features of silicon-containing material on a substrate uses a plasma of an etchant gas and an additive gas. In one version, the etchant gas comprises halogen species absent fluorine, and the additive gas comprises fluorine species and carbon species, or hydrogen species and carbon species.

Abstract: A method for etching and removing an anti-reflective coating from a substrate. The method comprises providing a substrate supporting a conductive layer (a tungsten-silicide layer) having an anti-reflective coating (e.g., a dielectric anti-reflective coating) disposed thereon. The anti-reflective coating is etched with an etchant gas consisting of NF3 and Cl2 to break through and to remove at least a portion of the anti-reflective coating to expose at least part of the conductive layer. The conductive layer is subsequently etched with the etchant gas to produce an anti-reflective coating gate structure which is used in semiconductor integrated circuits containing transistors.

Abstract: A method for etching and removing an anti-reflective coating from a substrate. The method comprises providing a substrate supporting a conductive layer (a tungsten-silicide layer) having an anti-reflective coating (e.g., a dielectric anti-reflective coating) disposed thereon. The anti-reflective coating is etched with an etchant gas consisting of NF3 and Cl2 to break through and to remove at least a portion of the anti-reflective coating to expose at least part of the conductive layer. The conductive layer is subsequently etched with the etchant gas to produce an anti-reflective coating gate structure which is used in semiconductor integrated circuits containing transistors.

Abstract: A method of etching a silicon-containing layer 170 on a substrate 45 comprises the steps of placing the substrate 45 on a support 75 in a process chamber 50. The substrate 45 is exposed to an energized process gas comprising a bromine-containing gas, a chlorine-containing gas, an inorganic fluorinated gas, and an oxygen gas. The volumetric flow ratio of the gas constituents is selected so that the energized process gas etches regions 180a,b having different concentrations of dopant in the polysilicon layer 170 at substantially the same etching rate. Optionally, the gas composition is also tailored to simultaneously clean off etch residue from the internal surfaces of a process chamber 50 during etching of the substrate 45.

Abstract: A method of etching polysilicon using a fluorinated gas chemistry to provide an etch rate in excess of 10,000 Å/min and a photoresist selectivity of better than 3:1. The method is accomplished using a combination of a fluorinated gas and a fluorocarbon gas, e.g., 50-60 sccm of SF6, 1-40 sccm of CHF3, and 40-50 sccm of O2 with a total chamber pressure of 4-60 mTorr. The power applied to the etch chemistry to produce an etching plasma is 400-1500 watts of inductive source power (at 13.56 MHz) via an inductively coupled antenna and 200-1500 watts (at 12.56 MHz) of cathode bias power applied via a cathode electrode within a wafer support pedestal. The pedestal supporting the wafer was maintained at 0-50 degrees C.

Abstract: A method of etching silicon using a gas mixture comprising fluorine (F) and oxygen (O). A fluoro-hydrocarbon gas is also used to provide added flexibility for profile and dimension control in the silicon trench. The method is applied to trench etching in a silicon substrate, and results in an etch rate exceeding about 1 &mgr;m/min. with a photoresist selectivity as high as about 9:1. The method can also be applied to etching doped or undoped polysilicon or amorphous silicon.

Abstract: A process for etching a substrate 25 in an etching chamber 30, and simultaneously cleaning a thin, non-homogeneous, etch residue deposited on the surfaces of the walls 45 and components of the etching chamber 30. In the etching step, process gas comprising etchant gas is used to etch a substrate 25 in the etching chamber 30 thereby depositing etch residue inside the chamber 30. Cleaning gas is added to the process gas for a sufficient time and in a volumetric flow ratio that is sufficiently high, to react with and remove substantially all the etch residue deposited by the process gas. The present method advantageously cleans the etch residue in the chamber 30, during the etching process, and without use of separate cleaning, conditioning, and seasoning process steps.

Abstract: An etchant mixture of carbon tetrafluoride and argon in a plasma etch chamber produces straight walled isolation trenches in a silicon nitride layer, the trenches having rounded bottoms and no microtrenching.

Abstract: A method for producing a semiconductor device from a silicon substrate supporting a patterned hardmask layer, a tungsten silicide layer, a polysilicon layer, and a gate oxide layer. The method comprises etching the tungsten silicide layer and the polysilicon layer with an etchant gas comprising carbon monoxide (CO) and chlorine (Cl.sub.2). The etchant gas may also include hydrogen bromide (HBr) or a nitrogen-containing gas (e.g., N.sub.2).

Abstract: Apparatus for measuring wafer support pedestal temperature in a semiconductor wafer processing system. The apparatus measures infrared energy emitted by the bottom of the pedestal via a tube having one end inserted in a bore through the underside of the cathode pedestal base. The distal end of the tube is coupled to a temperature sensor. Both the tube and temperature sensor are fitted with insulating sleeve adapters to suppress unwanted RF signals from coupling to the sensor.

Abstract: An etchant composition of nitrogen trifluoride and chlorine, preferably also including a passivation material such as hydrogen bromide, etches tungsten silicide-polysilicon gate layers with high selectivity to a thin underlying silicon oxide gate oxide layer to form straight wall, perpendicular profiles with low microloading and excellent profile control.