Abstract: A thin film protected capacitor structure having a thin film capacitor and a protection device is provided on an integrated circuit wafer. The wafer has a low resistivity substrate of a first type disposed under an epitaxial layer of a second type different from the first type. The structure includes a first heavily doped region, which is of the first type, in and through the epitaxial layer, and an oxide layer having a first oxide region disposed above the first heavily doped region. The first heavily doped region and the low resistivity substrate form the first plate of the thin film capacitor. There is also included a metal layer disposed above the first oxide region. A portion of this metal layer forms the second plate of the thin film capacitor. Between the second plate and the first plate, the aforementioned first oxide region represents the insulating dielectric. There is also included a second heavily doped region in the epitaxial layer.

Abstract: A Quarter Size Small Outline Packages (QSOP) integrated resistor/capacitor network. The QSOP integrated resistor/capacitor network includes resistor/capacitor filters implemented in a QSOP package in integrated form. In one embodiment, the QSOP integrated resistor/capacitor network includes at least six ground pins for coupling capacitors of the resistor/capacitor filters with a common ground to maximize the attenuation of ultra-high frequency signals filtered through the resistor/capacitor filters.

Abstract: A thin film protected capacitor structure having a thin film capacitor and a protection device is provided on an integrated circuit wafer. The wafer has a low resistivity substrate of a first type disposed under an epitaxial layer of a second type different from the first type. The structure includes a first heavily doped region, which is of the first type, in and through the epitaxial layer, and an oxide layer having a first oxide region disposed above the first heavily doped region. The first heavily doped region and the low resistivity substrate form the first plate of the thin film capacitor. There is also included a metal layer disposed above the first oxide region. A portion of this metal layer forms the second plate of the thin film capacitor. Between the second plate and the first plate, the aforementioned first oxide region represents the insulating dielectric. There is also included a second heavily doped region in the epitaxial layer.

Abstract: An integrated circuit for implementing a resistor network on a die of the integrated circuit. The integrated circuit includes a common conductor, which is disposed on a first side of the die and coupled to resistors of the resistor network. The integrated circuit further includes a substantially conductive substrate through the die. There is further included a conductive back side contact coupled to the substantially conductive substrate. The conductive back side contact is disposed on a second side of the die opposite the first side, whereby the common conductor, the substantially conductive substrate, and the conductive back side contact form a common conducting bus from the common conductor to the conductive back side contact through the die.