Abstract: A light reflected from a semiconductor die is used for enhanced control of substrate removal from the die. According to an example embodiment of the present invention, light reflected from a semiconductor die as it is undergoing substrate removal is used to detect the progress of the substrate removal process, and the removal process is controlled therefrom. In different embodiments, the reflected light is used to detect the removal of a portion of a layer of material in the die and to detect the removal of an entire layer of material.

Abstract: The invention is directed to a system and method for analyzing an integrated circuit having silicon on insulator (SOI) structure. According to one example embodiment of the present invention, an optical beam arrangement is adapted to direct a modulated beam at a selected portion of the integrated circuit. The beam is sufficiently modulated to inhibit optical beam intrusion on the structure and operation of the integrated circuit. A reflected optical waveform response is obtained from the SOI selected portion. The inhibition of optical beam intrusion enhances the ability to analyze integrated circuits using an optical beam, making possible the use of analysis methods that otherwise would be difficult or even impossible to use.

Abstract: The present invention is directed analysis of a flip-chip integrated circuit die having SOI structure that improves the ability to image and analyze selected portions of circuitry in the die. According to an example embodiment of the present invention, a lens is formed in a back side of a flip-chip die and over the insulator portion of SOI structure in the die. Light is directed at the lens and the lens is used to focus the light to target circuitry in the die. A reflection from the circuitry is detected and used to analyze the die, such as by imaging the circuitry in the die and identifying defects therein. The lens formed in the die enhances the ability to focus light to selected circuitry in the die and improves the ability to analyze dies having SOI structure through the insulator.

Abstract: Semiconductor analysis is improved via the use of fiber optic communications. According to an example embodiment of the present invention, a stimulation device is adapted to stimulate an integrated circuit die, and the die generates a response to the stimulation. An optical signal generator, either incorporated into the die or coupled to the die, detects the response, converts the response to an optical signal and transmits the optical signal. The optical signal is received at a testing arrangement adapted to analyze the die therefrom. The optical signal is used to analyze the die, improving signal quality and the ability to perform high-speed analysis of the die.

Abstract: According to an example embodiment of the present invention, a portion of substrate in the back side of a semiconductor chip is removed as a function of photons emitted through substrate remaining at the back side. The use of emitted photons is used to control the substrate removal process.

Abstract: According to an example embodiment of the present invention, a defect detection approach involves detecting the existence of defects in an integrated circuit as a function of at least one applied energy source. In response to energy that is applied to the integrated circuit, response signals are detected. A parameter including information such as amplitude, frequency, phase, or a spectrum is developed for a reference integrated circuit device and then compared to the detected response signal. The deviation in the response and reference signals, and the type of energy source used, are correlated to a particular defect in the device.

Abstract: Analysis of a semiconductor die having silicon-on-insulator (SOI) structure is enhanced by accessing the circuitry within die from the back side without breaching the thin insulator layer of the SOI structure. According to an example embodiment, a portion of substrate is removed from the back side of a semiconductor die having a SOI structure and a backside opposite circuitry in a circuit side. Electrical connection is made to a portion of the circuitry within the die via a capacitive coupling arrangement. The electrical connection is used to obtain an electrical measurement correlated with circuitry logic states of the die that is used for analysis.

Abstract: Semiconductor analysis is enhanced using a system and method for improving the heat-dissipation characteristics of a semiconductor die. According to an example embodiment of the present invention, a flip-chip integrated circuit die having circuitry in a circuit side opposite a back side is formed having a back side including a thermal conductivity enhancing material. The thermal conductivity enhancing material improves the heat dissipating characteristics of the die during operation and testing and helps to reduce or prevent overheating. An epitaxial layer of silicon is formed in the back side, and circuitry is constructed in the epitaxial layer. Pre-existing circuitry on the circuit side and the newly formed circuitry in the back side are electrically coupled.

Abstract: A method for detecting substrate damage in a flip chip die, having a back side and a circuit side, that uses magnetic resonance imaging. The back side of the die is first globally thinned down and a region for examination is selected. A magnetic field is applied to the selected region and then the region is scanned with a magnetic resonance imaging arrangement. A plurality of perturbations are measured to generate an array of perturbation signals, which are then converted to a local susceptibility map of the selected region of the die. The susceptibility map of the selected region is then examined to determine if there is any substrate damage.

Abstract: According to an example embodiment of the present invention, a semiconductor die having a buried insulator layer between a circuit side and a back side is selectively thinned. During thinning, a selected portion of the bulk silicon layer on the back side is removed and a void created. A circuit is formed in the void and is coupled to the existing circuitry on the circuit side of the die. The new circuit is used to analyze the die during operation, testing, or other conditions. The newly formed circuit enhances the ability to analyze the semiconductor die by adding flexibility to the traditional analysis methods used for integrated circuit dice. The newly formed circuit enables many new ways of interactively using the existing circuitry some of which include replacement of defective circuitry, modification of existing circuit operations, and stimulation of existing circuitry for testing.

Abstract: According to one aspect of the disclosure, the present invention provides methods and arrangements for testing a flip chip SOI semiconductor device after the back side of the chip has been thinned to expose a selected region in the substrate. For some chips, thinning removes substrate material useful for drawing heat away from the internal circuitry when the circuitry is running at high speeds. To compensate for this material loss, a special test fixture having a passive, corrosion-resistant heat-dissipating device is arranged to draw heat from the device.

Abstract: A method and system providing spatial and timing resolution for photoemission microscopy of an integrated circuit. A microscope having an objective lens forming a focal plane is arranged to view the integrated circuit, and an aperture element having an aperture is optically aligned in the back focal plane of the microscope. The aperture element is positioned for viewing a selected area of the integrated circuit. A position-sensitive avalanche photo-diode is optically aligned with the aperture to detect photoemissions when test signals are applied to the integrated circuit.

Abstract: The present invention is directed to enhancing the analysis and modification of a flip chip integrated circuit die having silicon on insulator (SOI) structure. According to one example embodiment, an optical nanomachining arrangement is adapted to direct an optical beam, such as a laser, at a selected portion of the flip chip SOI structure. The optical beam performs device edits to modify the circuitry contained in the SOI selected portion without necessarily damaging surrounding circuitry. The ability to make such device edits is advantageous for various applications, such as in dies of complex, circuitry containing multiple stacked layers of components, and for dies having densely packed circuitry.

Abstract: The ability to monitor virtually any portion of semiconductor device is enhanced via a grid formed for analyzing circuitry in the semiconductor device. According to an example embodiment of the present invention, a grid having a plurality of narrow probe points is formed extending over target circuitry in a semiconductor device. The grid is accessed and used for monitoring various target circuitry within the device by accessing the part of the grid that corresponds to the portion of the target circuitry to which access is desired.

Abstract: Analysis of a semiconductor die having silicon-on-insulator (SOI) structure is enhanced by accessing the circuitry within the die from the back side without necessarily breaching the insulator layer of the SOI structure. According to an example embodiment of the present invention, a semiconductor die having a SOI structure and a backside opposite circuitry in a circuit side is analyzed. An atomic force microscope is scanned across a thinned portion of the back side. The microscope responds to an electrical characteristic, such as a logic state, coupled from circuitry via the insulator portion of the die over which the microscope is being scanned. The response of the microscope to the die is detected and used to detect an electrical characteristic of the die.

Abstract: Analysis of a flip-chip type IC die having SOI structure is enhanced via analysis and repair of the die that make possible analysis that would typically result in the die being in a state of disrepair. According to an example embodiment of the present invention, a focused ion beam (FIB) is directed at a back side of a flip-chip die having a circuitry in a circuit side opposite a back side, wherein the circuitry including silicon on insulator (SOI) structure. The FIB is used to remove a selected portion of substrate including a portion of the insulator of the SOI structure from the die. The removed substrate exposes an insulator region in the die, and a signal is coupled from circuitry in the die via the exposed insulator region and used to analyze the die. Material is deposited in the exposed region and the selected portion of the die that had been removed is reconstructed.

Abstract: A system and method for analyzing an integrated circuit device involves generating a magnetic field in circuitry forming a power grid within the integrated circuit device. The magnetic field generator is switched off, and the charge on the power grid dissipates through internal device structures to ground. This decay of the charged power grid is detected and evaluated to assess the quality or consistency of the power distribution grid. Faulty power grids will have a decay pattern that differs from high quality power grids.

Abstract: According to an example embodiment, the present invention is directed to a system and method for analyzing an integrated circuit. A laser is directed to the back side of an integrated circuit and causes local heating, which generates acoustic energy in the circuit. The acoustic energy propagation in the integrated circuit is detected via at least two detectors. Using the detected acoustic energy from the detectors, at least one circuit defect is detected and located.

Abstract: According to an example embodiment of the present invention, a defect detection approach involves detecting the existence of defects in an integrated circuit as a function of acoustic energy. Acoustic energy propagating through the device is detected. A parameter including information such as amplitude, frequency, phase, or a spectrum is developed from the detected energy and correlated to a particular defect in the device.

Abstract: According to one aspect of the disclosure, the present invention provides methods and arrangements for milling the substrate of a semiconductor device and exposing a selected region in the substrate. A laser is directed at a selected area of the back side of the device to create a small marker to be used for alignment during the milling process. The substrate is then milled to expose the selected area within the substrate, using the marker as alignment.